ISP1362
Single-chip USB OTG controller
Philips Semiconductors
The HCD is first required to initialize the HcTransferCounter register with the byte
count to be transferred and check the HcBufferStatus register. The HCD then sends
the command (43H for reading of the INTL buffer, and C3H for writing to the INTL
buffer) to the HC through the I/O port of the microprocessor. After the command is
sent, the HCD starts reading data from the INTL buffer or writing data to the INTL
buffer. While the HCD is accessing the buffer, the buffer pointer of INTL also
increases automatically. When the pointer has reached the initialized byte count of
the HcTransferCounter register, the HC sets the AllEOTInterrupt bit of the
HcµPInterrupt register to logic 1 and updates the HcBufferStatus register.
15.8.3 HcINTLBlkSize register (R/W: 53H/D3H)
The ISP1362 requires the INTL buffer to be partitioned into several equal sized blocks
so that the HC can skip the current PTD and proceed to process the next PTD easily.
The block size of the INTL buffer is required to be specified in this register and must
be a multiple of 8 bytes. The default value of the block size is 64 bytes, and the
maximum allowable block size is 1024 bytes. Table 87 shows the bit allocation of the
register.
Code (Hex): 53 — read
Code (Hex): D3 — write
Table 87: HcINTLBlkSize register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
Reset
Access
Bit
reserved
BlockSize[9:8]
-
-
-
-
-
-
-
-
-
-
-
-
0
R/W
1
0
R/W
0
7
6
5
4
3
2
Symbol
Reset
Access
BlockSize[7:0]
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 88: HcINTLBlkSize register: bit description
Bit
Symbol
Description
15 to 10
9 to 0
-
reserved
BlockSize[9:0] The block size of the INTL buffer.
15.8.4 HcINTLPTDDoneMap register (R: 17H)
This is a 32-bit register, and the bit description is given in Table 89. Every bit of the
register represents the processing status of a PTD. Bit 0 of the register represents the
first PTD stored in the INTL buffer, bit 1 represents the second PTD stored in the
buffer, and so on. The register is updated once every ms by the HC and is cleared
upon read by the HCD. Bits that are set representing its corresponding PTDs are
processed by the HC and the ACK token is received from the device.
Code (Hex): 17 — read only
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
104 of 150
NXP [ NXP ]
