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9763-01 参数 Datasheet PDF下载

9763-01图片预览
型号: 9763-01
PDF下载: 下载PDF文件 查看货源
内容描述: 3.2 GHz的Δ-Σ调制的分数N频率合成器的低相位噪声应用 [3.2 GHz Delta-Sigma modulated Fractional-N Frequency Synthesizer for Low Phase Noise Applications]
分类和应用:
文件页数/大小: 15 页 / 289 K
品牌: PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
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PE9763
Product Specification
Table 5. DC Characteristics
V
DD
= 3.0 V, -40° C < TA < 85° C, unless otherwise specified
Symbol
I
DD
Parameter
Operational supply current;
Prescaler enabled, charge pump disabled
Conditions
V
DD
= 2.85 to 3.15 V
Min
Typ
25
Max
Units
mA
I
DD
I
DD
I
DD
Operational supply current;
Prescaler enabled, charge pump enabled
Operational supply current;
Prescaler disabled, charge pump disabled
Operational supply current;
Prescaler disabled, charge pump enabled
V
DD
= 2.85 to 3.15 V
V
DD
= 2.85 to 3.15 V
V
DD
= 2.85 to 3.15 V
30
mA
10
mA
15
mA
All Digital inputs: K[17:0], R[5:0], M[8:0], A[3:0], Direct,
Pre_en,
Rand_en, M2_sel, Cpsel,
Enh
(contains a 70 kΩ pull-down resistor)
V
IH
V
IL
I
IH
I
IL
High level input voltage
Low level input voltage
High level input current
Low level input current
V
DD
= 2.85 to 3.15 V
V
DD
= 2.85 to 3.15 V
V
IH
= V
DD
= 3.15 V
V
IL
= 0, V
DD
= 3.15 V
-1
0.7 x V
DD
0.3 x V
DD
+100
V
V
µA
µA
µA
µA
Reference Divider input: f
r
I
IHR
I
ILR
High level input current
Low level input current
V
IH
= V
DD
= 3.15 V
V
IL
= 0, V
DD
= 3.15 V
-100
+100
Counter and phase detector outputs: PD_D, PD_U
V
OLD
V
OHD
Output voltage LOW
Output voltage HIGH
I
out
= 6 mA
I
out
= -3 mA
I
out
= 200
µA
I
out
= -200
µA
V
CP
= V
DD
/ 2
V
CP
= V
DD
/ 2
1.0 V < V
CP
< V
DD
– 1.0 V
V
CP
= V
DD
/ 2
T
A
=
25°
C
Output current magnitude variation vs. voltage
1.0 V < V
CP
< V
DD
– 1.0 V
T
A
=
25°
C
Lock detect outputs: (Cext, LD)
V
OLC
V
OHC
V
OLLD
Output voltage LOW, Cext
Output voltage HIGH, Cext
Output voltage LOW, LD
I
out
= 0.1 mA
I
out
= -0.1 mA
I
out
= 1 mA
V
DD
- 0.4
0.4
0.4
V
V
V
15
%
V
DD
- 0.4
V
DD
- 0.4
0.4
V
V
Digital test outputs: Dout
V
OLD
V
OHD
Output voltage LOW
Output voltage HIGH
0.4
V
V
Charge Pump output: CP
I
CP
- Source
I
CP
-Sink
I
CPL
I
CP
- Source
vs. I
CP
- Sink
I
CP
vs. V
CP
Drive current
Drive current
Leakage current
Sink vs. source mismatch
-2.6
1.4
-1
2
2
-1.4
2.6
1
25
mA
mA
µA
%
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 15
Document No. 70-0140-01
UltraCMOS™ RFIC Solutions