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NCL30486B2DR2G 参数 Datasheet PDF下载

NCL30486B2DR2G图片预览
型号: NCL30486B2DR2G
PDF下载: 下载PDF文件 查看货源
内容描述: [Smart-Dimmable CC/CV PSR Controller]
分类和应用:
文件页数/大小: 32 页 / 289 K
品牌: ONSEMI [ ONSEMI ]
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NCL30486B  
Practically, the controller extracts the dutycycle by  
If a voltage lower than V  
is applied to the DIM  
ADIM(EN)  
measuring the current inside PDIM pin which is directly the  
opto coupler collector current.  
pin, the DRV pulses are disabled for controllers without the  
dimming CV mode option.  
If PDIM pin is left open, the controller delivers 100% of  
The DIM pin is pulled up internally by a small current  
source or resistor. Thus, if the pin is left open, the controller  
is able to start.  
I
. If the pin is pulled down for longer than 25 ms, the  
out  
controller is disabled.  
If the PWM dimming signal is removed during dimming,  
NOTE:  
the controller delivers 100% of I  
.
out  
Interaction between ADIM and PDIM: if ADIM and  
The NCL30486B set 100% of output current when the  
dutycycle of the signal applied on PDIM is above 93%.  
PDIM are both used at the same time, the resulting  
dimming set point if a multiplication of V  
and the  
ADIM  
dutyratio of PDIM signal.  
Analog Dimming  
During dimming, when the “Enable” signal is OK, the  
The pin ADIM pin allows implementing analog dimming  
of the LED light.  
controller starts pulsing after first valley, even if a higher  
valley number is selected by V  
. This is to avoid too  
If the power supply designer applies an analog signal  
REFX  
varying from V  
output current will increase or decrease proportionally to the  
voltage applied. For V = V , the power supply  
to V  
to the DIM pin, the  
long startup time while dimming at low output current  
value. After ZCD voltage during DRV off time is higher  
DIM(EN)  
DIM100  
than 0.65 V, the number of valley is selected by V  
.
DIM  
DIM100  
REFX  
delivers the maximum output current (V  
= 1 V).  
REFX  
In order to minimize discrete output current variation  
caused by valley change in deep dimming, valley  
synchronization is removed when the dimming setpoint is  
below 15%.  
If a voltage lower than V  
is applied to ADIM  
ADIM(MIN)  
pin, the output current is clamped to the selected dimming  
clamp value (see Dimming clamp section below)  
VREF  
100% VREF  
8% V  
REF  
5% V  
REF  
1% VREF  
VADIM(EN)  
VADIM100  
VADIM  
VADIM(MIN)  
Figure 65. ADIM Pin Dimming Curves  
www.onsemi.com  
22  
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