PEDL60851C-02
1
Semiconductor
ML60851C
End Point 0 Receive Payload Register (EP0RXPLD)
Read address
Write address
E2h
62h
D7
0
D6
0
D5
0
D4
0
D3
1
D2
0
D1
0
D0
0
After a hardware reset
After a bus reset
Definition
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
Maximum packet size
Maximum packet size:
Since the FIFO capacity for EP0 in the ML60851C is 8 bytes, write 08h in the
bMaxPacketSize0 byte of the device descriptor. The maximum packet size is fixed at 8
bytes in this register EP0RXPLD.
When a packet longer than 8 bytes is received, the stall bit of the EP0 status register is
asserted and the stall status is returned to the host computer.
The content of this register is fixed at 08h. This value will not change even if any other value is written in this
register.
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