PEDL60851C-02
1
Semiconductor
ML60851C
End Point 0 Transmit Payload Register (EP0TXPLD)
Read address
Write address
F2h
72h
D7
0
D6
x
D5
x
D4
x
D3
x
D2
x
D1
x
D0
x
After a hardware reset
After a bus reset
Definition
0
x
x
x
x
x
x
x
0
Maximum Packet Size (R/W)
Maximum packet size:
This is a register that has no relationship with the operation of the ML60851C, and can
be used as a general purpose register. Bit D7 is fixed at “0”.
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