NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
10.4.6.5 LDO specifications
10.4.6.5.1 VGEN1
Table 100.ꢀVGEN1 electrical characteristics
All parameters are specified at TMIN to TMAX (see Table 4), VIN = 3.6 V, VIN1 = 3.0 V, VGEN1[3:0] = 1111, IGEN1 = 10 mA,
typical external component values, unless otherwise noted. Typical values are characterized at VIN = 3.6 V, IN1 = 3.0 V,
VGEN1[3:0] = 1111, IGEN1 = 10 mA, and 25 °C, unless otherwise noted.
Symbol
VGEN1
VIN1
Parameter
Min
Typ
Max
Unit
Operating input voltage
Nominal output voltage
Operating load current
1.75
—
—
3.40
—
V
VGEN1NOM
IGEN1
Table 90
—
V
0.0
100
mA
VGEN1 DC
VGEN1TOL
Output voltage tolerance
1.75 V < VIN1 < 3.4 V
%
0.0 mA < IGEN1 < 100 mA
VGEN1[3:0] = 0000 to 1111
−3.0
—
—
3.0
—
VGEN1LOR
Load regulation
mV/mA
mV/mA
(VGEN1 at IGEN1 = 100 mA) − (VGEN1 at IGEN1
= 0.0 mA)
0.15
For any 1.75 V < VIN1 < 3.4 V
VGEN1LIR
Line regulation
(VGEN1 at VIN1 = 3.4 V) − (VGEN1 at VIN1
1.75 V)
=
—
0.30
—
For any 0.0 mA < IGEN1 < 100 mA
IGEN1LIM
IGEN1OCP
IGEN1Q
Current limit
mA
mA
µA
IGEN1 when VGEN1 is forced to
VGEN1NOM/2
122
115
—
167
—
200
200
—
Overcurrent protection threshold
IGEN1 required to cause the SCP function to
disable LDO when REGSCPEN = 1
Quiescent current
No load, change in IVIN and IVIN1
When VGEN1 enabled
14
VGEN1 AC and transient
[1]
PSRRVGEN1
PSRR
dB
IGEN1 = 75 mA, 20 Hz to 20 kHz
VGEN1[3:0] = 0000 to 1101
VGEN1[3:0] = 1110, 1111
50
37
60
45
—
—
NOISEVGEN1
Output noise density
VIN1 = 1.75 V, IGEN1 = 75 mA
100 Hz to < 1.0 kHz
1.0 kHz to < 10 kHz
10 kHz to 1.0 MHz
dBV/√Hz
—
—
—
−108
−118
−124
−100
−108
−112
PF4210
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© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
90 / 137
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