NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
Name
Bit number
R/W
Default Description
0x00 unused
UNUSED
7
—
Table 94.ꢀRegister VGEN2CTL - ADDR 0x6D
Name
Bit number
R/W
Default Description
VGEN2
3:0
R/W
0x80
Sets VGEN2 output voltage. See Table 90 for all possible
configurations.
VGEN2EN
4
R/W
0x00
Enables or disables VGEN2 output
• 0 = OFF
• 1 = ON
VGEN2STBY
VGEN2LPWR
UNUSED
5
6
7
R/W
R/W
—
0x00
0x00
0x00
Set VGEN2 output state when in standby. See Table 92.
Enable low-power mode for VGEN2. See Table 92.
unused
Table 95.ꢀRegister VGEN3CTL - ADDR 0x6E
Name
Bit number
R/W
Default Description
VGEN3
3:0
R/W
0x80
Sets VGEN3 output voltage.
See Table 91 for all possible configurations.
VGEN3EN
4
R/W
0x00
Enables or disables VGEN3 output
• 0 = OFF
• 1 = ON
VGEN3STBY
VGEN3LPWR
UNUSED
5
6
7
R/W
R/W
—
0x00
0x00
0x00
Set VGEN3 output state when in standby. Refer to Table 92.
Enable low-power mode for VGEN3. Refer to Table 92.
unused
Table 96.ꢀRegister VGEN4CTL - ADDR 0x6F
Name
Bit number
R/W
Default Description
VGEN4
3:0
R/W
0x80
Sets VGEN4 output voltage. See Table 91 for all possible
configurations.
VGEN4EN
4
R/W
0x00
Enables or disables VGEN4 output
• 0 = OFF
• 1 = ON
VGEN4STBY
VGEN4LPWR
UNUSED
5
6
7
R/W
R/W
—
0x00
0x00
0x00
Set VGEN4 output state when in standby. See Table 92.
Enable low-power mode for VGEN4. See Table 92.
unused
PF4210
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© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
88 / 137
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