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MC34PF4210A0ES 参数 Datasheet PDF下载

MC34PF4210A0ES图片预览
型号: MC34PF4210A0ES
PDF下载: 下载PDF文件 查看货源
内容描述: [14-channel power management integrated circuit (PMIC) for audio/video applications]
分类和应用: 集成电源管理电路
文件页数/大小: 137 页 / 1328 K
品牌: NXP [ NXP ]
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NXP Semiconductors  
PF4210  
14-channel power management integrated circuit (PMIC) for audio/video applications  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit  
VGEN2LITR  
Transient line response  
IGEN2 = 187.5 mA  
mV  
VIN1INITIAL = 1.75 V to VIN1FINAL = 2.25 V  
for VGEN2[3:0] = 0000 to 1101  
5.0  
8.0  
VIN1INITIAL = VGEN2 + 0.3 V to VIN1FINAL  
=
VGEN2 + 0.8 V for VGEN2[3:0] = 1110, 1111  
See Figure 30  
[1] The PSRR of the regulators is measured with the perturbing signal at the input of the regulator. The power management IC is supplied separately from  
the input of the regulator and does not contain the perturbed signal. During measurements, care must be taken not to operate in the dropout region of the  
regulator under test.  
10.4.6.5.3 VGEN3  
Table 102.ꢀVGEN3 electrical characteristics  
All parameters are specified at TMIN to TMAX (see Table 4), VIN = 3.6 V, VIN2 = 3.6 V, VGEN3[3:0] = 1111, IGEN3 = 10 mA,  
typical external component values, unless otherwise noted. Typical values are characterized at VIN = 3.6 V, VIN2 = 3.6 V,  
VGEN3[3:0] = 1111, IGEN3 = 10 mA, and 25 °C, unless otherwise noted.  
Symbol  
VGEN3  
VIN2  
Parameter  
Min  
Typ  
Max  
Unit  
[1]  
Operating input voltage  
V
1.8 V ≤ VGEN3NOM ≤ 2.5 V  
2.6 V ≤ VGEN3NOM ≤ 3.3 V  
2.8  
3.6  
3.6  
VGEN3NOM  
+ 0.250  
VGEN3NOM  
IGEN3  
Nominal output voltage  
Operating load current  
Table 91  
V
0.0  
100  
mA  
VGEN3 DC  
VGEN3TOL  
Output voltage tolerance  
VIN2MIN < VIN2 < 3.6 V  
%
0.0 mA < IGEN3 < 100 mA  
VGEN3[3:0] = 0000 to 1111  
−3.0  
3.0  
VGEN3LOR  
Load regulation  
mV/mA  
mV/mA  
(VGEN3 at IGEN3 = 100 mA) − (VGEN3 at IGEN3  
= 0.0 mA)  
0.07  
For any VIN2MIN < VIN2 < 3.6 V  
VGEN3LIR  
Line regulation  
(VGEN3 at VIN2 = 3.6 V) − (VGEN3 at VIN2MIN  
For any 0.0 mA < IGEN3 < 100 mA  
)
0.8  
IGEN3LIM  
IGEN3OCP  
IGEN3Q  
Current limit  
mA  
mA  
µA  
IGEN3 when VGEN3 is forced to  
VGEN3NOM/2  
127  
120  
167  
200  
200  
Overcurrent protection threshold  
IGEN3 required to cause the SCP function to  
disable LDO when REGSCPEN = 1  
Quiescent current  
No load, change in IVIN and IVIN2  
When VGEN3 enabled  
13  
PF4210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2018. All rights reserved.  
Data sheet: technical data  
Rev. 2.0 — 14 November 2018  
93 / 137  
 
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