NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
Symbol
Parameter
Min
Typ
Max
Unit
VGEN3 AC and transient
[2]
PSRRVGEN3
PSRR
dB
IGEN3 = 75 mA, 20 Hz to 20 kHz
VGEN3[3:0] = 0000 to 1110, VIN2 = VIN2MIN
+ 100 mV
35
55
40
60
—
—
VGEN3[3:0] = 0000 to 1000, VIN2
VGEN3NOM + 1.0 V
=
NOISEVGEN3
Output noise density
VIN2 = VIN2MIN, IGEN3 = 75 mA
100 Hz to < 1.0 kHz
1.0 kHz to < 10 kHz
dBV/√Hz
mV/µs
—
—
—
−114
−129
−135
−102
−123
−130
10 kHz to 1.0 MHz
SLWRVGEN3
Turn on slew rate
10 % to 90 % of end value
VIN2MIN ≤ VIN2 ≤ 3.6 V, IGEN3 = 0.0 mA
VGEN3[3:0] = 0000 to 0011
VGEN3[3:0] = 0100 to 0111
VGEN3[3:0] = 1000 to 1011
VGEN3[3:0] = 1100 to 1111
—
—
—
—
—
—
—
—
22.0
26.5
30.5
34.5
GEN3tON
Turn on time
µs
Enable to 90 % of end value, VIN2
VIN2MIN, 3.6 V
=
60
—
500
IGEN3 = 0.0 mA
GEN3tOFF
Turn off time
ms
Disable to 10 % of initial value, VIN2
VIN2MIN
=
—
—
10
IGEN3 = 0.0 mA
GEN3OSHT
Startup overshoot
%
%
VIN2 = VIN2MIN, 3.6 V, IGEN3 = 0.0 mA
—
—
1.0
—
2.0
3.0
VGEN3LOTR
Transient load response
VIN2 = VIN2MIN, 3.6 V
IGEN3 = 10 to 100 mA in 1.0 µs
Peak of overshoot or undershoot of VGEN3
with respect to final value. See Figure 30
VGEN3LITR
Transient line response
IGEN3 = 75 mA
mV
VIN2INITIAL = 2.8 V to VIN2FINAL = 3.3 V for
VGEN3[3:0] = 0000 to 0111
—
5.0
8.0
VIN2INITIAL = VGEN3 + 0.3 V to VIN2FINAL
= VGEN3 + 0.8 V for VGEN3[3:0] = 1000 to
1010
VIN2INITIAL = VGEN3 + 0.25 V to VIN2FINAL
3.6 V for VGEN3[3:0] = 1011 to 1111
=
See Figure 30
[1] When the LDO output voltage is set above 2.6 V, the minimum allowed input voltage needs to be at least the output voltage plus 0.25 V, for proper
regulation due to the dropout voltage generated through the internal LDO transistor.
[2] The PSRR of the regulators is measured with the perturbing signal at the input of the regulator. The power management IC is supplied separately from
the input of the regulator and does not contain the perturbed signal. During measurements, care must be taken not to operate in the dropout region of the
regulator under test. VIN2MIN refers to the minimum allowed input voltage for a particular output voltage.
PF4210
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© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
94 / 137
NXP [ NXP ]
