NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
7.11.2 System Options Register 1 (SIMOPT1)
The following clock source and frequency selections are available using the system
option register 1 as shown in Table 39.
Table 39.ꢀSystem option register 1 (SIMOPT1) (address $1802)
Bit
R
7
COPE
1
6
COPCLKS
0
5
STOPE
0
4
RFEN
—
3
TRE
0
2
TRH
0
1
BKGDPE
1
0
W
Reset
0
= Reserved
Table 40.ꢀSIMOPT1 register field descriptions
Field
Description
COP Enable — This control bit enables the COP watchdog. This bit is a write-once bit so that only the first
write after reset is honored. Reset sets the COPE bit.
7
0ꢀCOP Watchdog disabled.
1ꢀCOP Watchdog enabled.
COPE
COP Clock Select — This control bit selects the clock source for the COP watchdog timer. This bit is a
write-once bit so that only the first write after reset is honored. This bit is cleared by an MCU reset.
6
0ꢀSelect the LFO oscillator output.
1ꢀSelect the CPU bus clock.
COPCLKS
STOP Mode Select — This control bit enables/disables the STOP instruction to enter a STOP mode defined
by the SPMSCR2 register. This bit is a write-once bit so that only the first write after reset is honored. This
bit is cleared by an MCU reset.
5
STOPE
0ꢀDisable STOP modes.
1ꢀEnable STOP modes.
RF Module Enable — This bit enables or disables the RF module. This bit is not affected by any reset or
power on after STOP exit. It is only initialized at the first power up. This bit can be written anytime.
4
1ꢀRF module enabled.
0ꢀRF module disabled.
RFEN
Temperature Restart Enable — This control bit enables the temperature restart circuit to interrupt the MCU
after being shutdown at either a very high or very low temperature. This bit is cleared by an MCU reset.
3
0ꢀTemperature restart disabled.
1ꢀTemperature restart enabled.
TRE
Temperature Restart Level — This control bit selects whether the temperature restart circuit will interrupt the
MCU after being shutdown on returning from either a very high or very low temperature. This bit is cleared
by an MCU reset.
2
TRH
0ꢀTemperature restart interrupts MCU on return from a very low temperature.
1ꢀTemperature restart interrupts MCU on return from a very high temperature.
BKGD Pin Enable — BKGDPE can be used to allow the BKGD/PTA4 pin to be shared in applications as an
output-only general purpose I/O pin:
1
0ꢀBKGD function disabled, PTA4 output-only enabled.
1ꢀBKGD function enabled, PTA4 disabled.
BKGDPE
0
Reserved
Reserved
FXTH87ERM
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2019. All rights reserved.
Reference manual
Rev. 5.0 — 4 February 2019
46 / 183
NXP [ NXP ]
