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NANO127SC1AN 参数 Datasheet PDF下载

NANO127SC1AN图片预览
型号: NANO127SC1AN
PDF下载: 下载PDF文件 查看货源
内容描述: [ARM® Cortex®-M 32-bit Microcontroller]
分类和应用: 微控制器
文件页数/大小: 95 页 / 2021 K
品牌: NUVOTON [ NUVOTON ]
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Nano100(A)  
5.18 I2S  
5.18.1 Overview  
The audio controller consists of I2S protocol to interface with external audio CODEC. Two 8 word  
deep FIFO for receiving path and transmitting path respectively and is capable of handling 8-, 16-,  
24-, 32-bit word sizes. PDMA controller handles the data movement between FIFO and memory.  
5.18.2 Features  
Support Master mode and Slave mode  
Capable of handling 8-, 16-, 24- or 32-bit word sizes  
Supports monaural and stereo audio data  
Supports I2S and MSB justified data format  
Provides two 8-level FIFO data buffers, one for transmitting and the other for receiving  
Generates interrupt requests when buffer levels cross a programmable boundary  
Support PDMA transfer  
Mar 31, 2015  
Page 73 of 95  
Revision V1.00  
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