Nexperia
PBSS4260PANPS
60 V, 2 A NPN/PNP low VCEsat (BISS) double transistor
aaa-020833
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
0.75
0.50
2
10
0.33
0.20
0.10
10
0.05
0.02
0.01
0
1
-1
10
-5
-4
-3
-2
10
-1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, 4-layer copper, standard footprint
Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
aaa-020834
3
10
Z
th(j-a)
(K/W)
2
duty cycle = 1
0.75
10
0.50
0.33
0.20
0.10
10
0.05
0.02
0.01
0
1
-1
10
-5
-4
-3
-2
10
-1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, 4-layer copper, mounting pad for collector 1 cm2
Fig. 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
©
PBSS4260PANPS
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 February 2016
6 / 21
NEXPERIA [ Nexperia ]
