CHAPTER 3 SPECIFICATIONS OF PCI HOST BRIDGE MACRO
3.6 Initializing PCI Host Bridge Macro
The PCI host bridge macro must be initialized according to the following procedure to acknowledge memory
access and I/O access to the PCI bus and main memory (SDRAM) access from the PCI device.
Figure 3-5. Initializing PCI Host Bridge Macro
Internal PCI bus
reset released
PCI_CONTROL register
Set PCI_RESET bit to 1
PCI_MEM_BASE register
Set any address to M_BASE field
PCI_I/O_BASE register
PCI I/O area setting
Set any address to I/O_BASE field
PCI_CONTROL register
PCI memory area setting
Set MEM_EN and IO_EN bits to 11
SYSTEM_MEM_BASE register
Set any address to S_BASE field
SYSTEM_MEM_RANGE register
Set any value to S_RANGE field
Main memory (SDRAM)
area setting
SDRAM_CTL register
Set bit width of column address to COLUMN_SIZE field
Set number of wait clocks to WAIT_STATE field
Set CAS latency to CAS_LATENCY field
Set BUS_SIZE bit to bit width of data bus
Set latency between successive accesses to CYCLE_LATENCY field
SDRAM control setting
PCI bus control setting
PCI_CONTROL register
Set TARGET_EN bit to 1
Set required bit of PCI_REQ field to 1
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Application Note U17121EJ1V1AN
NEC [ NEC ]
