Power Consumption Benchmark
I_DMA4 EQU I_VEC+$20
I_DMA5 EQU I_VEC+$22
; DMA Channel 4
; DMA Channel 5
;------------------------------------------------------------------------
; Timer Interrupts
;------------------------------------------------------------------------
I_TIM0C EQU I_VEC+$24 ; TIMER 0 compare
I_TIM0OF EQU I_VEC+$26; TIMER 0 overflow
I_TIM1C EQU I_VEC+$28 ; TIMER 1 compare
I_TIM1OF EQU I_VEC+$2A; TIMER 1 overflow
I_TIM2C EQU I_VEC+$2C ; TIMER 2 compare
I_TIM2OF EQU I_VEC+$2E; TIMER 2 overflow
;------------------------------------------------------------------------
; ESSI Interrupts
;------------------------------------------------------------------------
I_SI0RD EQU I_VEC+$30 ; ESSI0 Receive Data
I_SI0RDE EQU I_VEC+$32; ESSI0 Receive Data w/ exception Status
I_SI0RLS EQU I_VEC+$34; ESSI0 Receive last slot
I_SI0TD EQU I_VEC+$36 ; ESSI0 Transmit data
I_SI0TDE EQU I_VEC+$38; ESSI0 Transmit Data w/ exception Status
I_SI0TLS EQU I_VEC+$3A; ESSI0 Transmit last slot
I_SI1RD EQU I_VEC+$40 ; ESSI1 Receive Data
I_SI1RDE EQU I_VEC+$42; ESSI1 Receive Data w/ exception Status
I_SI1RLS EQU I_VEC+$44
I_SI1TD EQU I_VEC+$46
; ESSI1 Receive last slot
; ESSI1 Transmit data
I_SI1TDE EQU I_VEC+$48; ESSI1 Transmit Data w/ exception Status
I_SI1TLS EQU I_VEC+$4A; ESSI1 Transmit last slot
;------------------------------------------------------------------------
; SCI Interrupts
;------------------------------------------------------------------------
I_SCIRD EQU I_VEC+$50
I_SCIRDE EQU I_VEC+$52
I_SCITD EQU I_VEC+$54
I_SCIIL EQU I_VEC+$56
I_SCITM EQU I_VEC+$58
; SCI Receive Data
; SCI Receive Data With Exception Status
; SCI Transmit Data
; SCI Idle Line
; SCI Timer
;------------------------------------------------------------------------
; HOST Interrupts
;------------------------------------------------------------------------
I_HRDF EQU I_VEC+$60
I_HTDE EQU I_VEC+$62
I_HC EQU I_VEC+$64
; Host Receive Data Full
; Host Transmit Data Empty
; Default Host Command
;-----------------------------------------------------------------------
; INTERRUPT ENDING ADDRESS
;------------------------------------------------------------------------
I_INTEND EQU I_VEC+$FF
; last address of interrupt vector space
A-12