MITSUBISHI MICROCOMPUTERS
3827 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
b7
b0
b7
b0
Serial I/O1 status register
(SIO1STS : address 001916
Serial I/O1 control register
(SIO1CON : address 001A16
)
)
BRG count source selection bit (CSS)
0: f(XIN) (f(XCIN) in low-speed mode)
1: f(XIN)/4 (f(XCIN)/4 in low-speed mode)
Transmit buffer empty flag (TBE)
0: Buffer full
1: Buffer empty
Serial I/O1 synchronous clock selection bit (SCS)
0: BRG output divided by 4 when clock synchronous serial
I/O is selected.
BRG output divided by 16 when UART is selected.
1: External clock input when clock synchronous serial I/O is
selected.
Receive buffer full flag (RBF)
0: Buffer empty
1: Buffer full
Transmit shift register shift completion flag (TSC)
0: Transmit shift in progress
1: Transmit shift completed
External clock input divided by 16 when UART is selected.
S
0: P4
1: P4
RDY1 output enable bit (SRDY)
Overrun error flag (OE)
0: No error
1: Overrun error
7
pin operates as ordinary I/O pin.
7
pin operates as SRDY1 output pin.
Transmit interrupt source selection bit (TIC)
0: Interrupt when transmit buffer has emptied
1: Interrupt when transmit shift operation is completed
Parity error flag (PE)
0: No error
1: Parity error
Transmit enable bit (TE)
0: Transmit disabled
1: Transmit enabled
Framing error flag (FE)
0: No error
1: Framing error
Receive enable bit (RE)
0: Receive disabled
1: Receive enabled
Summing error flag (SE)
0: OE U PE U FE =0
1: OE U PE U FE =1
Serial I/O1 mode selection bit (SIOM)
0: Asynchronous serial I/O (UART)
1: Clock synchronous serial I/O
Not used (returns “1” when read)
Serial I/O1 enable bit (SIOE)
0: Serial I/O1 disabled
b7
b0
UART control register
(UARTCON : address 001B16
(pins P4
1: Serial I/O1 enabled
(pins P4 –P4 operate as serial I/O pins)
4–P47 operate as ordinary I/O pins)
)
Character length selection bit (CHAS)
4
7
0: 8 bits
1: 7 bits
Parity enable bit (PARE)
0: Parity checking disabled
1: Parity checking enabled
Parity selection bit (PARS)
0: Even parity
1: Odd parity
Stop bit length selection bit (STPS)
0: 1 stop bit
1: 2 stop bits
P45/TXD P-channel output disable bit (POFF)
0: CMOS output (in output mode)
1: N-channel open-drain output (in output mode)
Not used (return “1” when read)
Fig. 25 Structure of serial I/O1 control registers
28
MITSUBISHI [ Mitsubishi Group ]
