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M38270EFMXXXFS 参数 Datasheet PDF下载

M38270EFMXXXFS图片预览
型号: M38270EFMXXXFS
PDF下载: 下载PDF文件 查看货源
内容描述: 单片8位CMOS微机 [SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER]
分类和应用: 计算机
文件页数/大小: 70 页 / 1104 K
品牌: MITSUBISHI [ Mitsubishi Group ]
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MITSUBISHI MICROCOMPUTERS  
3827 Group  
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER  
[Transmit Buffer/Receive Buffer Register  
(TB/RB)] 001816  
The transmit buffer register and the receive buffer register are lo-  
cated at the same address. The transmit buffer register is  
write-only and the receive buffer register is read-only. If a charac-  
ter bit length is 7 bits, the MSB of data stored in the receive buffer  
register is “0”.  
[Serial I/O1 Status Register (SIO1STS)]  
001916  
The read-only serial I/O1 status register consists of seven flags  
(bits 0 to 6) which indicate the operating status of the serial I/O  
function and various errors.  
Three of the flags (bits 4 to 6) are valid only in UART mode.  
The receive buffer full flag (bit 1) is cleared to “0” when the receive  
buffer is read.  
If there is an error, it is detected at the same time that data is  
transferred from the receive shift register to the receive buffer reg-  
ister, and the receive buffer full flag is set. A write to the serial I/O1  
status register clears all the error flags OE, PE, FE, and SE. Writ-  
ing “0” to the serial I/O1 enable bit (SIOE) also clears all the status  
flags, including the error flags.  
All bits of the serial I/O1 status register are initialized to “0” at re-  
set, but if the transmit enable bit (bit 4) of the serial I/O1 control  
register has been set to “1”, the transmit shift register shift comple-  
tion flag (bit 2) and the transmit buffer empty flag (bit 0) become  
“1”.  
[Serial I/O1 Control Register (SIO1CON)]  
001A16  
The serial I/O1 control register contains eight control bits for the  
serial I/O1 function.  
[UART Control Register (UARTCON) ]001B16  
This is a 5 bit register containing four control bits, which are valid  
when UART is selected and set the data format of an data re-  
ceiver/transfer, and one control bit, which is always valid and sets  
the output structure of the P45/TXD pin.  
[Baud Rate Generator(BRG)] 001616  
The baud rate generator determines the baud rate for serial trans-  
fer.  
The baud rate generator divides the frequency of the count source  
by 1/(n + 1), where n is the value written to the baud rate genera-  
tor.  
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