Advanced Information
CMOS MT90826
Read/Write Address:
000AH for FOR0 register,
000BH for FOR1 register,
000CH for FOR2 register,
000DH for FOR3 register,
0000H for all FOR registers.
Reset value:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
OF71
OF70
OF61
OF60
OF51
OF50
OF41
OF40
OF31
OF30
OF21
OF20
OF11
OF10
OF01
OF00
FOR0 register
OF151 OF150 OF141 OF140 OF131 OF130 OF121 OF120 OF111 OF110 OF101 OF100 OF91
OF90
OF81
OF80
FOR1 register
OF231 OF230 OF221 OF220 OF211 OF210 OF201 OF200 OF191 OF190 OF181 OF180 O171
OF170 OF161 OF160
FOR2 register
OF311 OF310 OF301 OF300 OF291 OF290 OF281 OF280 OF271 OF270 OF261 OF260 OF251 OF250 OF241 OF240
FOR3 register
Name
Description
(Note 1)
OFn1, OFn0
(n = 0 to 31)
Output Offset Bits 1 - 0. These two bits define how soon the serial interface transmitter
output the bit 0 from the STo pin. The output stream offset can be selected to -45ns from
the point where the external frame pulse input signal is applied to the F0i inputs of the
device. See Table 11 and Figure 5
Table 10 - Frame Output Offset (FOR) Register Bits
Corresponding Output Offset Bits
Output Stream Offset for
8Mb/s, 16Mb/s, 4&8Mb/s and 16&8Mb/s modes
(Not available for 2Mb/s, 4Mb/s and 2&4 Mb/s modes)
OFn1
OFn0
0
0
1
1
0
1
0
1
0ns
-15ns
-30ns
-45ns
Table 11 - Output Offset Bits (FD9, FD2-0)
F0i
CLK
(16.384MHz)
STo Stream
Bit 7
offset=00, (0ns)
Bit 7
STo Stream
offset=01, (-15ns)
denotes the starting point of the bit cell
Figure 5 - Examples for Frame Output Offset Timing
17
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