MT8950
ISO-CMOS
RTS
CTS
DSR
DTR
RLSD
TxD
RxD
DTE
RS-232
TTL
Digital PBX
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
A
A
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
A
A
A
A
A
A
A
A
A
A
A
A
A
A
MT8950
MT8980
MT8950
A
A
Receiver
Receiver
A
A
A
A
A
A
A
A
A
A
D
X
2
DSTi
DSTi
D
X
2
STo1
STo3
Bipolar to
Bipolar to
A
A
A
A
Unipolar
Unipolar
A
A
A
A
D
X
1
D
X
1
Converter
Converter
A
A
A
A
A
A
DSTo
DSTo
STi1
STi3
A
A
A
A
A
A
D
R
2
Unipolar
Unipolar
A
A
D
R
2
A
A
to Bipolar
to Bipolar
A
A
A
A
D
R
1
Converter
A
A
Converter
D
R
1
A
A
A
A
A
A
A
A
A
A
Line Driver
Line Driver
A
A
A
A
MPU
A
A
A
A
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
A
A
TTL
RS-232
DTE
RTS
CTS
Bipolar RZ signal
Line
Driver /
Receiver
NRZ /
Bipolar
Converter
Random Logic
or
Microcomputer
Level
Converters
DSR
DTR
RLSD
TxD
RxD
Level
Converters
Random Logic
or
Microcomputer
NRZ /
Bipolar
Converter
Line
Driver /
Receiver
Bipolar RZ signal
Figure 10 - Block Diagram Illustration of a Scheme to Submultiplex RS-232 Control Signals
the codec cannot be used in the local carrier mode.
If this facility is to be used, an appropriate clock can
be input to the device. The long SPACE detection
circuitry and the Data Activity output can be used for
monitoring the codec if necessary.
Figure 10 shows a block diagram schematic of a
circuit which could be used to submultiplex RS-232
control signals with the data. The data and control
signals are operated on by the microprocessor or the
logic circuitry and subsequently transmitted as a
three level signal. The control signals are encoded
as bipolar violations. Since the control status does
not change very frequently during a call, this
information is transmitted only when no data is
available. Circuitry near the Codec converts the
bipolar signal into a unipolar format and inputs it at
D
X
1 and D
X
2. Conversely, the low speed data from
the Codec output at D
R
1 and D
R
2 is first converted
to the bipolar format before being transmitted.The
Data Codec is selected to operate in the RZ format.
6-14
The microprocessor or the random logic circuit
examines the received signal for violations. If a
stream of violations is detected, then the signal is
interpreted to be control information. The detected
violations are decoded and the appropriate change
in the status of the RS-232 control signals is
implemented. If no violations are detected then the
incoming signal is considered to be the data and it is
rerouted to the RxD pin of the RS-232 connector.
The microprocessor could also be used in the initial
call setup and for error checking of the received
control information. This scheme could be used to
provide transparent modem capability to any of the
ST-BUS based equipment.
MITEL [ MITEL NETWORKS CORPORATION ]
