MT8950
ISO-CMOS
1.
2.
3.
4.
5.
6.
7.
DSTo
SPo
DA
DP
D
R
1
D
R
2
NRZo
-
-
-
-
-
-
-
High Impedance
+5V
(unasserted)
+5V
(unasserted)
GND (unasserted)
+5V
(inactive)
GND (inactive)
GND (Mark condition)
The SPo pin could then be monitored by the
system processor to detect a prompt from the
peripheral.
MT8950
+5V
R
11
C
NRZo
16
SPo
15
SPi
The
FF.
internal Control Register is loaded with HEX
Applications
Figure 7 - Long Space Detection Circuit
External Power Reset
When the reset input (PRST) is taken low, the data
codec circuit goes into reset mode. The conditions
present on the output pins are as follows:
A block diagram schematic of a simple Voice-Data
integrated switching system is illustrated in Figure 8.
The data terminal can access a number of remote
devices via the gateway provided by the Data
Codec. In this application, the Data Codec function
parallels that of the Voice Codec, i.e., the Voice
Digital PBX
Data
Codec
Voice
Codec
ST-BUS Format
Voice
Codecs
Main
Frame
Computer
Data
Codecs
Data Terminal
Equipment
T1/CEPT
Interface
MT8980
Digital Switch
MPU
ST-BUS Format
T1/CEPT Leased Lines
1.544 Mbit/s or 2.048 Mbit/s
Voice
Codecs
Main
Frame
Computer
Data
Codecs
T1/CEPT
Interface
Digital
Line
Interface
Digital
Network
Interface
Data
Codec
Digital
Line
Interface
256 kbit/s
Digital Line
160/80
kbit/s
Main
Frame
Computer
Voice
Codec
Main
Frame
Computer
Data
Codec
Digital
Network
Interface
Voice
Codec
Figure 8 - Voice-Data integration using the Data Codec
6-12
MITEL [ MITEL NETWORKS CORPORATION ]
