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MT8950AC 参数 Datasheet PDF下载

MT8950AC图片预览
型号: MT8950AC
PDF下载: 下载PDF文件 查看货源
内容描述: ISO- CMOS ST- BUS⑩系列数据编解码器 [ISO-CMOS ST-BUS⑩ FAMILY Data Codec]
分类和应用: 解码器编解码器电信集成电路PC
文件页数/大小: 16 页 / 226 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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ISO-CMOS
MARK
D
Bipolar RZ
Equivalent
D
RxE
D
V
V
MARK
D
MT8950
NRZ
Equivalent
SPACE
SPACE
Establishes MARK polarity. See text for complete explanation.
52
µs.
Nom. or
104
µs.
Nom. or
> 125
µs
D
X
1
Input
MARK Pulses
(Polarity
Established)
D
D
4
µs.
Min.
T
b
Max.
T
b
= Bit Period
125
µs.
Min.
D
X
2
Input
SPACE Pulses.
D
Signal Regenerated at Remote End
D
D
R
2
Output
MARK Pulses
52
µs.
Nom. or
104
µs.
Nom. or
> 125
µs
D
R
1
Output
SPACE Pulses
V = Violations Pulse; D = Data Pulse
D
D
35
µs.
Nom.
D
V
125
µs.
Min.
V
125
µs.
Min.
35
µs.
Nom.
D
V
V
Figure 4 - Example Input/Output Waveform in the RZ format (DF=HIGH)
word on the first rising edge of the clock after F1i
and CA are taken low. The 8 bit TEM word from
the input ST-BUS stream is clocked into the device
on the negative edge of the C2i clock. For proper
codec operation, the ST-BUS interface (DSTo, DSTi,
52
µs.
Nom. or
104
µs.
Nom. or
> 125
µs
D
X
1
NRZ Input
SPACE
MARK
SPACE
125
µs.
Min.
D
X
2
Secondary
Input
Signal Regenerated at Remote End
D
R
1
Data
Output
D
R
2
Secondary
Output
Each transition on this output denotes a pulse input at D
X
2 on the remote end
SPACE
MARK
SPACE
125
µs.
Min.
MARK
4
µs.
Min.
121
µs.
Max.
and CSTi) should be enabled for only 8 clock periods
of the C2i clock in any 125µs period (one ST-BUS
frame time) as shown in Figure 11. All data input
and output at the ST-BUS interface takes place at
2.048 Mbps.
MARK
Figure 5 - Example Input/Output Waveform in the NRZ format (DF=LOW)
6-9