64Mb: x32
SDRAM
CLOCK SUSPEND MODE 1
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
t
CK
t
CL
CLK
CKE
t
CH
t
t
CKS CKH
t
t
CKS
CKH
t
t
CMS
CMH
COMMAND
DQM0-3
READ
NOP
NOP
NOP
NOP
NOP
WRITE
NOP
t
t
CMS
CMH
t
AS
t
AH
2
2
A0-A9
COLUMN m
COLUMN e
t
AS
t
AH
A10
t
AS
t
AH
BA0, BA1
BANK
BANK
t
AC
t
AC
t
OH
t
HZ
t
DS
t
DH
DOUT
m
DOUT m + 1
DOUT
e
DOUT e + 1
DQ
t
LZ
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
-6
-7
-5
-6
-7
SYMBOL* MIN
MAX
MIN
MAX
MIN
MAX UNITS
SYMBOL* MIN
MAX
MIN
1.5
1
MAX
MIN
MAX UNITS
t
t
AC (3)
4.5
5.5
7.5
17
5.5
8
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CKS
1.5
1
2
1
2
1
2
ns
ns
ns
ns
ns
t
t
t
t
t
t
t
t
t
AC (2)
CMH
CMS
DH
t
AC (1)
17
1.5
1
1.5
1
t
AH
AS
1
1.5
2
1
1.5
2.5
2.5
6
1
2
t
t
t
DS
1.5
1.5
CH
2.75
2.75
7
HZ (3)
HZ (2)
HZ (1)
4.5
–
5.5
7.5
17
5.5
8
ns
ns
ns
ns
ns
CL
2
t
CK (3)
CK (2)
CK (1)
5
–
17
t
t
t
–
10
20
1
10
20
1
LZ
1
1
2
1
t
–
OH
1.5
2.5
CKH
1
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 2, the CAS latency = 3, and auto precharge is disabled.
2. A8 and A9 = “Don’t Care.”
64Mb: x32 SDRAM
64MSDRAMx32_5.p65 – Rev. B; Pub. 6/02
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.
©2002,MicronTechnology,Inc.
38
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