64Mb: x32
SDRAM
ELECTRICALCHARACTERISTICSANDRECOMMENDEDACOPERATINGCONDITIONS
(Notes: 5, 6, 8, 9, 11; notes appear on page 35)
ACCHARACTERISTICS
PARAMETER
Access time from CLK
(pos.edge)
-6
-7
SYMBOL
MIN MAX MIN MAX UNITS NOTES
t
CL = 3
CL = 2
CL = 1
AC(3)
AC(2)
AC(1)
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
CKH
CKS
CMH
CMS
DH
DS
5.5
7.5
17
5.5
8
17
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
t
t
t
Address hold time
Address setup time
CLKhigh-levelwidth
CLK low-level width
Clock cycle time
1
1.5
2.5
2.5
6
10
20
1
1.5
1
1.5
1
1
2
2.75
2.75
7
10
20
1
2
1
2
1
t
t
t
t
CL = 3
CL = 2
CL = 1
23
23
23
t
t
t
CKE hold time
CKE setup time
CS#, RAS#, CAS#, WE#, DQM hold time
CS#, RAS#, CAS#, WE#, DQM setup time
Data-in hold time
t
t
t
t
t
Data-in setup time
Data-outhigh-impedancetime
1.5
2
t
CL = 3
CL = 2
CL = 1
HZ (3)
HZ (2)
HZ (1)
5.5
7.5
17
5.5
8
17
10
10
10
t
t
t
Data-outlow-impedancetime
Data-outholdtime
ACTIVEtoPRECHARGEcommand
ACTIVEtoACTIVEcommandperiod
AUTOREFRESHperiod
ACTIVE to READ or WRITE delay
Refresh period (4,096 rows)
PRECHARGEcommandperiod
ACTIVE bankatoACTIVE bankbcommand
Transition time
LZ
OH
RAS
RC
RFC
RCD
REF
RP
1
2
42
60
60
18
1
t
2.5
42
70
70
20
t
120k
120k
t
t
t
t
64
64
t
18
12
0.3
20
14
0.3
t
RRD
T
25
7
24
t
1.2
1.2
t
t
WRITE recovery time
WR
1CLK+
6ns
1CLK+
7ns
CK
12ns
70
14ns
70
ns
ns
28
20
t
Exit SELF REFRESH to ACTIVE command
XSR
64Mb: x32 SDRAM
64MSDRAMx32_5.p65 – Rev. B; Pub. 6/02
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.
©2002,MicronTechnology,Inc.
33
MICRON [ MICRON TECHNOLOGY ]
