欢迎访问ic37.com |
会员登录 免费注册
发布采购

MT41J256M4 参数 Datasheet PDF下载

MT41J256M4图片预览
型号: MT41J256M4
PDF下载: 下载PDF文件 查看货源
内容描述: DDR3 SDRAM MT41J256M4 â ????梅格32 ×4× 8银行MT41J128M8 â ????梅格16 ×8× 8银行MT41J64M16 â ???? 8梅格×16× 8银行 [DDR3 SDRAM MT41J256M4 – 32 Meg x 4 x 8 banks MT41J128M8 – 16 Meg x 8 x 8 banks MT41J64M16 – 8 Meg x 16 x 8 banks]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 214 页 / 2938 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号MT41J256M4的Datasheet PDF文件第115页浏览型号MT41J256M4的Datasheet PDF文件第116页浏览型号MT41J256M4的Datasheet PDF文件第117页浏览型号MT41J256M4的Datasheet PDF文件第118页浏览型号MT41J256M4的Datasheet PDF文件第120页浏览型号MT41J256M4的Datasheet PDF文件第121页浏览型号MT41J256M4的Datasheet PDF文件第122页浏览型号MT41J256M4的Datasheet PDF文件第123页  
1Gb: x4, x8, x16 DDR3 SDRAM  
Commands  
Commands  
DESELECT  
The DESELT (DES) command (CS# HIGH) prevents new commands from being execu-  
ted by the DRAM. Operations already in progress are not affected.  
NO OPERATION  
The NO OPERATION (NOP) command (CS# LOW) prevents unwanted commands from  
being registered during idle or wait states. Operations already in progress are not affec-  
ted.  
ZQ CALIBRATION LONG  
The ZQ CALIBRATION LONG (ZQCL) command is used to perform the initial calibra-  
tion during a power-up initialization and reset sequence (see Figure 5± (page 135)).  
This command may be issued at any time by the controller, depending on the system  
environment. The ZQCL command triggers the calibration engine inside the DRAM. Af-  
ter calibration is achieved, the calibrated values are transferred from the calibration en-  
gine to the DRAM I/O, which are reflected as updated RON and ODT values.  
The DRAM is allowed a timing window defined by either tZQinit or tZQoper to perform  
a full calibration and transfer of values. When ZQCL is issued during the initialization  
sequence, the timing parameter tZQinit must be satisfied. When initialization is com-  
plete, subsequent ZQCL commands require the timing parameter tZQoper to be satis-  
fied.  
ZQ CALIBRATION SHORT  
The ZQ CALIBRATION SHORT (ZQCS) command is used to perform periodic calibra-  
tions to account for small voltage and temperature variations. A shorter timing window  
is provided to perform the reduced calibration and transfer of values as defined by tim-  
ing parameter tZQCS. A ZQCS command can effectively correct a minimum of ±.5ꢀ RON  
and RTT impedance error within 64 clock cycles, assuming the maximum sensitivities  
specified in Table 42 (page 66) and Table 43 (page 66).  
ACTIVATE  
The ACTIVATE command is used to open (or activate) a row in a particular bank for a  
subsequent access. The value on the BA[2:±] inputs selects the bank, and the address  
provided on inputs A[n:±] selects the row. This row remains open (or active) for accesses  
until a PRECHARGE command is issued to that bank.  
A PRECHARGE command must be issued before opening a different row in the same  
bank.  
READ  
The READ command is used to initiate a burst read access to an active row. The address  
provided on inputs A[2:±] selects the starting column address, depending on the burst  
length and burst type selected (see Burst Order table for additional information). The  
value on input A1± determines whether auto precharge is used. If auto precharge is se-  
lected, the row being accessed will be precharged at the end of the READ burst. If auto  
PDF: 09005aef826aa906  
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
119  
‹ 2006 Micron Technology, Inc. All rights reserved.  
 复制成功!