8, 16, 32 MEG x 64
NONBUFFERED DRAM DIMMs
EDO-PAGE-MODE EARLY WRITE CYCLE
t
t
RP
RASP
V
V
IH
IL
RAS#
CAS#
t
t
t
RSH
CSH
PC
t
t
t
t
t
t
t
t
CP
CRP
RCD
CAS
CP
CAS
CP
CAS
V
V
IH
IL
t
t
ACH
AR
t
t
t
ACH
RAD
ACH
t
t
t
t
t
t
t
t
CAH
ASR
RAH
ASC
CAH
ASC
CAH
ASC
V
V
IH
IL
ADDR
ROW
COLUMN
COLUMN
COLUMN
ROW
t
t
t
CWL
CWL
CWL
t
t
t
t
t
t
WCH
WCS
WCH
WCS
WCH
WCS
t
t
t
WP
WP
WP
V
V
IH
IL
WE#
t
t
WCR
RWL
t
t
t
t
t
t
DS
DH
DS
DH
DS
DH
V
V
IOH
IOL
DQ
VALID DATA
VALID DATA
VALID DATA
V
V
IH
IL
OE#
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
-6
-5
-6
SYMBOL
MIN
12
38
0
MAX
MIN
15
45
0
MAX
UNITS
ns
SYMBOL
MIN
20
9
MAX
MIN
25
12
10
60
14
40
15
15
10
45
0
MAX
UNITS
ns
t
t
ACH
PC
t
t
t
t
t
t
AR
ns
RAD
RAH
RASP
RCD
ns
t
ASC
ns
9
ns
t
ASR
0
0
ns
50
11
30
13
13
8
125,000
125,000
ns
t
CAH
8
10
10
10
5
ns
ns
t
CAS
8
10,000
10,000
ns
RP
ns
t
t
CP
8
ns
RSH
ns
t
t
t
t
t
t
CRP
5
ns
RWL
WCH
WCR
WCS
ns
t
CSH
38
8
45
10
10
0
ns
ns
t
CWL
ns
38
0
ns
t
DH
8
ns
ns
t
DS
0
ns
WP
5
5
ns
8, 16, 32 Meg x 64 Nonbuffered DRAM DIMMs
DM78.p65 – Rev. 2/99
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.
©1999,MicronTechnology,Inc.
18
MICRON [ MICRON TECHNOLOGY ]
