8, 16, 32 MEG x 64
NONBUFFERED DRAM DIMMs
EARLY WRITE CYCLE
t
RC
t
t
RP
RAS
V
V
IH
IL
RAS#
CAS#
t
CSH
t
RSH
t
t
t
CAS
CRP
RCD
V
V
IH
IL
t
AR
t
RAD
t
t
t
t
CAH
ASR
RAH
ASC
t
ACH
V
V
IH
IL
ADDR
ROW
COLUMN
ROW
t
CWL
t
RWL
t
WCR
t
t
WCH
WCS
t
WP
WE#
V
V
IH
IL
t
DS
t
DH
V
V
IOH
IOL
DQ
VALID DATA
V
V
IH
IL
OE#
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
-6
-5
-6
SYMBOL
MIN
12
38
0
MAX
MIN
15
45
0
MAX
UNITS
ns
SYMBOL
MIN
9
MAX
10,000
MIN
10
60
104
14
40
15
15
10
45
0
MAX
UNITS
ns
t
t
ACH
RAH
t
t
AR
ns
RAS
50
84
11
30
13
13
8
10,000
ns
t
t
ASC
ns
RC
ns
t
t
ASR
0
0
ns
RCD
ns
t
t
CAH
8
10
10
5
ns
RP
ns
t
t
CAS
8
10,000
10,000
ns
RSH
ns
t
t
CRP
5
ns
RWL
ns
t
t
CSH
38
8
45
10
10
0
ns
WCH
ns
t
t
CWL
ns
WCR
38
0
ns
t
t
DH
8
ns
WCS
ns
t
t
DS
0
ns
WP
5
5
ns
t
RAD
9
12
ns
8, 16, 32 Meg x 64 Nonbuffered DRAM DIMMs
DM78.p65 – Rev. 2/99
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.
©1999,MicronTechnology,Inc.
16
MICRON [ MICRON TECHNOLOGY ]
