PIC18F2450/4450
TABLE 13-2: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1
Reset
Values
on page
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
RCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RI
RBIE
TO
—
TMR0IF
PD
INT0IF
POR
RBIF
BOR
49
50
51
51
51
51
50
50
50
50
50
50
IPEN
—
SBOREN(1)
ADIF
—
PIR1
RCIF
RCIE
RCIP
—
TXIF
TXIE
TXIP
—
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
CCP1IP TMR2IP TMR1IP
PIE1
—
ADIE
—
IPR1
—
ADIP
—
TRISC
TMR1L
TMR1H
T1CON
CCPR1L
CCPR1H
CCP1CON
TRISC7
TRISC6
—
TRISC2
TRISC1
TRISC0
Timer1 Register Low Byte
Timer1 Register High Byte
RD16
T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
—
—
DC1B1
DC1B0
CCP1M3 CCP1M2 CCP1M1 CCP1M0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare and Timer1.
Note 1: The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.
DS39760A-page 126
Advance Information
© 2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
