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PIC18C452-I/L 参数 Datasheet PDF下载

PIC18C452-I/L图片预览
型号: PIC18C452-I/L
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能微控制器,10位A / D [High-Performance Microcontrollers with 10-Bit A/D]
分类和应用: 微控制器
文件页数/大小: 296 页 / 4835 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18CXX2  
13.1  
CCP1 Module  
13.2  
CCP2 Module  
Capture/Compare/PWM Register1 (CCPR1) is com-  
prised of two 8-bit registers: CCPR1L (low byte) and  
CCPR1H (high byte). The CCP1CON register controls  
the operation of CCP1. All are readable and writable.  
Capture/Compare/PWM Register2 (CCPR2) is com-  
prised of two 8-bit registers: CCPR2L (low byte) and  
CCPR2H (high byte). The CCP2CON register controls  
the operation of CCP2. All are readable and writable.  
TABLE 13-1: CCP MODE - TIMER RESOURCE  
CCP Mode  
Timer Resource  
Capture  
Compare  
PWM  
Timer1 or Timer3  
Timer1 or Timer3  
Timer2  
TABLE 13-2: INTERACTION OF TWO CCP MODULES  
CCPx Mode CCPy Mode  
Interaction  
Capture  
Capture  
Capture  
TMR1 or TMR3 time-base. Time base can be different for each CCP.  
Compare  
The compare could be configured for the special event trigger, which clears either TMR1  
or TMR3 depending upon which time base is used.  
Compare  
PWM  
Compare  
PWM  
The compare(s) could be configured for the special event trigger, which clears TMR1 or  
TMR3 depending upon which time base is used.  
The PWMs will have the same frequency and update rate  
(TMR2 interrupt).  
PWM  
PWM  
Capture  
None  
None  
Compare  
DS39026B-page 110  
Preliminary  
7/99 Microchip Technology Inc.  
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