PIC18CXX2
13.3.3 SOFTWARE INTERRUPT
13.3
Capture Mode
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit CCP1IF following any such
change in operating mode.
In Capture mode, CCPR1H:CCPR1L captures the 16-
bit value of the TMR1 or TMR3 registers when an event
occurs on pin RC2/CCP1. An event is defined as:
• every falling edge
• every rising edge
13.3.4 CCP PRESCALER
• every 4th rising edge
• every 16th rising edge
There are four prescaler settings, specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off or the CCP module is not in capture mode,
the prescaler counter is cleared. This means that any
reset will clear the prescaler counter.
An event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit CCP1IF (PIR1<2>) is set. It must
be cleared in software. If another capture occurs before
the value in register CCPR1 is read, the old captured
value will be lost.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore the first capture may be from
a non-zero prescaler. Example 13-1 shows the recom-
mended method for switching between capture pres-
calers. This example also clears the prescaler counter
and will not generate the “false” interrupt.
13.3.1 CCP PIN CONFIGURATION
In Capture mode, the RC2/CCP1 pin should be config-
ured as an input by setting the TRISC<2> bit.
Note: If the RC2/CCP1 is configured as an out-
put, a write to the port can cause a capture
condition.
EXAMPLE 13-1: CHANGING BETWEEN
CAPTURE PRESCALERS
13.3.2 TIMER1/TIMER3 MODE SELECTION
CLRF
CCP1CON, F ; Turn CCP module off
MOVLW NEW_CAPT_PS ; Load WREG with the
; new prescaler mode
The timers that are to be used with the capture feature
(either Timer1 and/or Timer3) must be running in timer
mode or synchronized counter mode. In asynchronous
counter mode, the capture operation may not work.
The timer to be used with each CCP module is selected
in the T3CON register.
; value and CCP ON
MOVWF CCP1CON
; Load CCP1CON with
; this value
FIGURE 13-1: CAPTURE MODE OPERATION BLOCK DIAGRAM
TMR3H
TMR3L
CCPR1L
TMR1L
Set flag bit CCP1IF
T3CCP2
TMR3
Enable
Prescaler
÷ 1, 4, 16
CCP1 Pin
CCPR1H
TMR1
Enable
and
edge detect
T3CCP2
TMR1H
CCP1CON<3:0>
Q’s
Set flag bit CCP2IF
T3CCP1
T3CCP2
TMR3H
TMR3L
CCPR2L
TMR1L
TMR3
Enable
Prescaler
÷ 1, 4, 16
CCP2 Pin
CCPR2H
TMR1
Enable
and
edge detect
T3CCP2
T3CCP1
TMR1H
CCP2CON<3:0>
Q’s
7/99 Microchip Technology Inc.
Preliminary
DS39026B-page 111
MICROCHIP [ MICROCHIP ]
