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PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
TABLE 5-3:  
Register  
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)  
MCLR Resets  
WDT Reset  
Power-on Reset,  
Brown-out Reset  
Wake-up via WDT  
or Interrupt  
Applicable Devices  
RESETInstruction  
Stack Resets  
CAP3BUFL/ 2331 2431 4331 4431  
MAXCNTL  
xxxx xxxx  
uuuu uuuu  
uuuu uuuu  
CAP1CON  
CAP2CON  
CAP3CON  
DFLTCON  
2331 2431 4331 4431  
2331 2431 4331 4431  
2331 2431 4331 4431  
2331 2431 4331 4431  
-0-- 0000  
-0-- 0000  
-0-- 0000  
-000 0000  
-0-- 0000  
-0-- 0000  
-0-- 0000  
-000 0000  
-u-- uuuu  
-u-- uuuu  
-u-- uuuu  
-uuu uuuu  
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.  
Shaded cells indicate conditions do not apply for the designated device.  
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).  
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the  
interrupt vector (0008h or 0018h).  
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are  
updated with the current value of the PC. The STKPTR is modified to point to the next location in the  
hardware stack.  
4: See Table 5-2 for Reset value for specific condition.  
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When  
not enabled as PORTA pins, they are disabled and read ‘0’.  
6: Bit 3 of PORTE and LATE are enabled if MCLR functionality is disabled. When not enabled as the PORTE  
pin, they are disabled and read as ‘0’. The 28-pin devices do not have only RE3 implemented.  
2010 Microchip Technology Inc.  
DS39616D-page 59  
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