PIC17C75X
In Figure 5-5, Figure 5-6 and Figure 5-7, TPWRT >
TOST, as would be the case in higher frequency crys-
tals. For lower frequency crystals, (i.e., 32 kHz) TOST
would be greater.
FIGURE 5-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD)
VDD
MCLR
INTERNAL POR
TPWRT
PWRT TIME-OUT
TOST
OST TIME-OUT
INTERNAL RESET
FIGURE 5-6: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD)
VDD
MCLR
INTERNAL POR
TPWRT
PWRT TIME-OUT
TOST
OST TIME-OUT
INTERNAL RESET
FIGURE 5-7: SLOW RISE TIME (MCLR TIED TO VDD)
Minimum VDD operating voltage
5V
1V
0V
VDD
MCLR
INTERNAL POR
TPWRT
PWRT TIME-OUT
TOST
OST TIME-OUT
INTERNAL RESET
DS30264A-page 24
Preliminary
1997 Microchip Technology Inc.