PIC17C75X
5.1.5
BROWN-OUT RESET (BOR)
FIGURE 5-8: EXTERNAL BROWN-OUT
PROTECTION CIRCUIT 1
PIC17C75X devices have an on-chip Brown-out Reset
circuitry. This circuitry places the device into a reset
when the device voltage falls below a trip point (BVDD).
This ensures that the device does not continue pro-
gram execution outside the valid operation range of the
device. Brown-out resets are typically used in AC line
applications or large battery applications where large
loads may be switched in (such as automotive).
VDD
VDD
33k
10k
MCLR
40 kΩ
PIC17CXXX
Note: Before using the on-chip brown-out for a
voltage supervisory function, please
review the electrical specifications to
ensure that they meet your requirements.
This circuit will activate reset when VDD goes below
(Vz + 0.7V) where Vz = Zener voltage.
A configuration bit, BODEN, can disable (if clear/pro-
grammed) or enable (if set) the Brown-out Reset cir-
cuitry. If VDD falls below BVDD (Typically 4.0V,
parameter D005 in electrical specification section), for
greater than parameter D035, the brown-out situation
will reset the chip. A reset is not guaranteed to occur if
VDD falls below BVDD for less than parameter D035.
The chip will remain in Brown-out Reset until VDD rises
above BVDD. The Power-up Timer will now be invoked
and will keep the chip in reset an additional 96 ms. If
VDD drops below BVDD while the Power-up Timer is
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be initialized. Once VDD
rises above BVDD, the Power-up Timer will execute a
96 ms time delay. Figure 5-10 shows typical Brown-out
situations.
FIGURE 5-9: EXTERNAL BROWN-OUT
PROTECTION CIRCUIT 2
VDD
VDD
R1
Q1
MCLR
R2
40 kΩ
PIC17CXXX
This brown-out circuit is less expensive, albeit less
accurate. Transistor Q1 turns off when VDD is below a
certain level such that:
In some applications the Brown-out reset trip point of
the device may not be at the desired level. Figure 5-8
and Figure 5-9 are two examples of external circuitry
that may be implemented. Each needs to be evaluated
to determine if they match the requirements of the
application.
R1
= 0.7V
VDD •
R1 + R2
FIGURE 5-10: BROWN-OUT SITUATIONS
VDD
BVDD Max.
BVDD Min.
Internal
Reset
96 ms
VDD
BVDD Max.
BVDD Min.
Internal
Reset
< 96 ms
96 ms
96 ms
VDD
BVDD Max.
BVDD Min.
Internal
Reset
DS30264A-page 28
Preliminary
1997 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
