W3H128M72E-XSBX / W3H128M72E-XNBX
AC TIMING PARAMETERS
667Mbs CL6
533Mbs CL5
400Mbs CL4
Parameter
Symbol
Unit
Min
Max
8,000
8,000
8,000
0.52
Min
Max
Min
Max
CL=6
CL=5
CL=4
tCK(6)
tCK(5)
tCK(6)
tCH
3,000
3,000
Clock cycle time
3,750
5,000
8,000
8,000
0.52
5,000
5,000
8,000
8,000
0.52
ps
ps
tCK
tCK
ps
5,000
CK high-level width
CK low-level width
Half clock period
0.48
0.48
0.48
tCL
0.48
0.52
0.48
0.52
0.48
0.52
tHP
MIN (tCH, tCL)
MIN (tCH, tCL)
MIN (tCH, tCL)
AVG
AVG
AVG
AVG
AVG
AVG
tCK
tCK
tCK
tCK
tCK
tCK
abs
PER
PER
DTY
DTY
PER
PER
DTY
DTY
PER
PER
Absolute tCK
tCK
(MIN)+ tJIT
(MAX)+ tJIT
(MIN)+ tJIT
(MAX)+ tJIT
(MIN)+ tJIT
(MAX)+ tJIT
ps
(MIN)
(MAX)
(MIN)
(MAX)
(MIN)
(MAX)
AVG
AVG
tCK
tCK
AVG
AVG
AVG
AVG
tCK
tCK
tCK
tCK
*
*
(MAX)
(MAX)
AVG
AVG
AVG
AVG
DTY
(MIN)* tCH
(MIN)+ tJIT
(MIN)* tCH
(MIN)+ tJIT
(MIN)* tCH
(MIN)+ tJIT
(MAX)* tCH
(MAX)+ tJIT
abs
AVG
AVG
Absolute CK high-level width
tCH
tCH
tCH
ps
DTY
DTY
DTY
(MAX)+ tJIT
(MAX)+ tJIT
(MIN)
(MIN)
(MIN)
(MAX)
(MAX)
(MAX)
AVG
AVG
AVG
AVG
AVG
AVG
tCK
tCK
tCK
tCK
tCK
tCK
*
*
*
*
*
*
(MIN)
AVG
(MAX)
AVG
(MIN)
AVG
(MAX)
AVG
(MIN)
AVG
(MAX)
AVG
abs
Absolute CK low-level width
tCL
tCL
tCL
tCL
tCL
tCL
tCL
ps
DTY
DTY
DTY
DTY
(MIN)+ tJIT
(MAX)+ tJIT
(MIN)+ tJIT
(MAX)+ tJIT
(MIN)+ tJIT
(MAX)+ tJIT
(MIN)
-125
-125
(MAX)
(MIN)
-125
-125
(MAX)
(MIN)
-125
-125
(MAX)
PER
Clock jitter - period
tJIT
125
125
125
125
125
125
ps
ps
ps
ps
ps
ps
ps
ps
ps
DUTY
Clock jitter - half period
tJIT
CC
Clock jitter - cycle to cycle
tJIT
250
250
250
Cumulative jitter error, 2 cycles
Cumulative jitter error, 3 cycles
Cumulative jitter error, 4 cycles
Cumulative jitter error, 5 cycles
Cumulative jitter error, 6-10 cycles
Cumulative jitter error, 11-50 cycles
tERR2per
tERR3per
-175
-225
-250
-250
-350
-450
175
225
250
250
350
450
-175
-225
-250
-250
-350
-450
175
225
250
250
350
450
-175
-225
-250
-250
-350
-450
175
225
250
250
350
450
tERR4per
tERR5per
tERR6-10per
tERR11-50per
23
4163.12E-0716-ss-W3H128M72E-XSBX / XNBX
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com