W3H128M72E-XSBX / W3H128M72E-XNBX
AC TIMING PARAMETERS (continued)
667Mbs CL6
533Mbs CL5
400Mbs CL4
Parameter
Address and control input pulse width for each input
Symbol
Unit
Min
Max
Min
Max
Min
Max
tIPW
tISa
0.6
0.6
0.6
tCK
ps
ps
ps
ps
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCK
ns
400
500
600
Address and control input setup time
Address and control input hold time
tISb
200
250
350
tIHa
400
500
600
tIHb
275
375
475
CAS# to CAS# command delay
tCCD
tRC
2
2
2
ACTIVE to ACTIVE (same bank) command
ACTIVE bank a to ACTIVE bank b command
ACTIVE to READ or WRITE delay
Four Bank Activate period
55
55
55
tRRD
tRCD
tFAW
tRAS
tRTP
tWR
10
10
10
15
15
15
50
50
50
ACTIVE to PRECHARGE command
Internal READ to precharge command delay
Write recovery time
40
70,000
40
70,000
40
70,000
7.5
7.5
7.5
15
15
15
Auto precharge write recovery + precharge time
Internal WRITE to READ command delay
PRECHARGE command period
tDAL
tWTR
tRP
tWR + tRP
tWR + tRP
tWR + tRP
7.5
7.5
10
15
15
15
PRECHARGE ALL command period
LOAD MODE command cycle time
CKE low to CK, CK# uncertainty
tRPA
tMRD
tDELAY
15
2
15
2
15
2
tIS +tIH + tCK
tIS +tIH + tCK
tIS +tIH + tCK
REFRESH to Active or Refresh to Refresh command
interval
tRFC
tREFI
tRIFIM
tREFIM
195
70,000
7.8
195
70,000
7.8
195
70,000
7.8
ns
ꢀs
ꢀs
ꢀs
Average periodic refresh interval (commercial and
industrial)
Average periodic refresh interval
(military 85 to 95°C junction)
3.9
3.9
3.9
Average periodic refresh interval
(military 95 to 125°C junction)
1.95
1.95
1.95
Exit self refresh to non-READ command
Exit self refresh to READ
Exit self refresh timing reference
ODT turn-on delay
tXSNR
tXSRD
tlSXR
tAOND
tAON
tRFC(MIN) + 10
tRFC(MIN) + 10
tRFC(MIN) + 10
ns
tCK
ps
tCK
ps
tCK
ps
200
tIS
200
tIS
200
tIS
2
2
2
2
2
2
ODT turn-on
tAC(MIN)
2.5
tAC(MAX) + 1000
2.5
tAC(MIN)
2.5
tAC(MAX) + 1000
2.5
tAC(MIN)
2.5
tAC(MAX) + 1000
2.5
ODT turn-off delay
tAOFD
tAOF
ODT turn-off
tAC(MIN)
tAC(MAX) + 600
tAC(MIN)
tAC(MAX) + 600
tAC(MIN)
tAC(MAX) + 600
tAC(MIN)
2000
+
2 x tCK
tAC(MAX) + 1000
2 x tCK
tAC(MAX) + 1000
+
tAC(MIN)
2000
+
2 x tCK
tAC(MAX) + 1000
2 x tCK
tAC(MAX) + 1000
+
tAC(MIN)
2000
+
2 x tCK
tAC(MAX) + 1000
2 x tCK
tAC(MAX) + 1000
+
ODT turn-on (power-down mode)
ODT turn-off (power-down mode)
tAONPD
tAOFPD
ps
ps
tAC(MIN)
2000
+
+
tAC(MIN)
2000
+
+
tAC(MIN)
2000
+
+
ODT to power-down entry latency
ODT power-down exit latency
ODT enable from MRS command
tANPD
tAXPD
tMOD
3
8
3
8
3
8
tCK
tCK
ns
12
12
12
Exit active power-down to READ command,
MR[bit12=0]
tXARD
2
2
2
tCK
tCK
Exit active power-down to READ command,
MR[bit12=1]
tXARDS
7-AL
6-AL
6-AL
Exit precharge power-down to any non-READ
command
tXP
2
3
2
3
2
3
tCK
tCK
CKE minimum high/low time
tCKE
25
4163.12E-0716-ss-W3H128M72E-XSBX / XNBX
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com