W3H128M72E-XSBX / W3H128M72E-XNBX
AC TIMING PARAMETERS (continued)
667Mbs CL6
533Mbs CL5
400Mbs CL4
Min Max
Parameter
DQ hold skew factor
Symbol
Unit
Min
-
Max
400
Min
-
Max
400
tQHS
tAC
-
450
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
DQ output access time from CK/CK#
Data-out high impedance window from CK/CK#
DQS Low-Z window from CK/CK#
DQ Low-Z window from CK/CK#
-100
1,250
-100
1,350
-100
1,350
tHZ
tAC(MAX)
tAC(MAX)
tAC(MAX)
tAC(MAX)
tAC(MAX)
tAC(MAX)
tAC(MAX)
tAC(MAX)
tAC(MAX)
1
tLZ
tAC(MN)
2*tAC(MN)
400
tAC(MN)
2*tAC(MN)
400
tAC(MN)
2*tAC(MN)
400
2
tLZ
tDSa
tDHa
tDSb
tDHb
tDIPW
tQHS
350
350
400
DQ and DM input setup time relative to DQS
100
100
150
225
225
275
DQ and DM input pulse width (for each input)
Data hold skew factor
0.35
0.35
0.35
400
400
450
DQ-DQS hold, DQS to first DQ to go nonvalid, per
access
tQH
tHP - tQHS
tHP - tQHS
tHP - tQHS
ps
Data valid output window (DVW)
DQS input high pulse width
tDVW
tDQSH
tDQSL
tDQSCK
tDSS
tQH - tDQSQ
0.35*tCK
0.35*tCK
-100
tQH - tDQSQ
0.35*tCK
0.35*tCK
-100
tQH - tDQSQ
0.35*tCK
0.35*tCK
-100
ns
tCK
tCK
ps
DQS input low pulse width
DQS output access time fromCK/CK#
DQS falling edge to CK rising - setup time
DQS falling edge from CK rising - hold time
1,250
240
1,350
300
1,350
350
0.2*tCK
0.2*tCK
0.2*tCK
0.2*tCK
0.2*tCK
0.2*tCK
tCK
tCK
tDSH
DQS-DQ skew, DOS to last DQ valid, per group, per
access
tDQSQ
ps
DQS read preamble
tRPRE
tRPST
0.9*tCK
0.4*tCK
0
1.1*tCK
0.6*tCK
0.9*tCK
0.4*tCK
0
1.1*tCK
0.6*tCK
0.9*tCK
0.4*tCK
0
1.1*tCK
0.6*tCK
tCK
tCK
ps
DQS read postamble
DQS write preamble setup time
tWPRES
DQS write preamble
tWPRE
0.35*tCK
0.25*tCK
0.25
tCK
DQS write postamble
tWPST
tDQSS
0.4*tCK
-0.25*tCK
WL-TDQSS
0.6*tCK
0.25*tCK
0.4*tCK
-0.25*tCK
WL-TDQSS
0.6*tCK
0.25*tCK
0.4*tCK
-0.25*tCK
WL-TDQSS
0.6*tCK
0.25*tCK
tCK
tCK
tCK
Positive DQS latching edge to associated clock edge
Write command to first DQS latching transition
WL+TDQSS
WL+TDQSS
WL+TDQSS
24
4163.12E-0716-ss-W3H128M72E-XSBX / XNBX
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com