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W3H128M72E-400NBM 参数 Datasheet PDF下载

W3H128M72E-400NBM图片预览
型号: W3H128M72E-400NBM
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 128MX72, 1.35ns, CMOS, PBGA208, BGA-208]
分类和应用: 动态存储器双倍数据速率内存集成电路
文件页数/大小: 31 页 / 1024 K
品牌: MERCURY [ MERCURY UNITED ELECTRONICS INC ]
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W3H128M72E-XSBX / W3H128M72E-XNBX  
is programmed again or the device loses power. Reprogramming  
the EMR will not alter the contents of the memory array, provided  
it is performed correctly.  
EXTENDED MODE REGISTER 2  
The extended mode register 2 (EMR2) controls functions beyond  
those controlled by the mode register. Currently all bits in EMR2  
are reserved except for E7, as shown in Figure 8. The EMR2  
is programmed via the LM command and will retain the stored  
information until it is programmed again or the device loses power.  
Reprogramming the EMR will not alter the contents of the memory  
array, provided it is performed correctly.  
EMR3 must be loaded when all banks are idle and no bursts are  
in progress, and the controller must wait the specied time tMRD  
before initiating any subsequent operation. Violating either of these  
requirements could result in unspecied operation.  
COMMAND TRUTH TABLE  
The following table provides a quick reference of DDR2 SDRAM  
available commands, including CKE power-down modes, and  
bank-to-bank commands.  
Bit E7 (A7) must be programmed as"1" to provide a faster refresh  
rate on devices if the junction temperature (TJ) exceeds 85°C but  
doesn't exceed 95°C. Refer to operating junction temperature  
limits in "DC operating conditions" table. Self refresh function is  
not available for military grade devices.  
EMR2 must be loaded when all banks are idle and no bursts are  
in progress, and the controller must wait the specied time tMRD  
before initiating any subsequent operation. Violating either of these  
requirements could result in unspecied operation.  
EXTENDED MODE REGISTER 3  
The extended mode register 3 (EMR3) controls functions beyond  
those controlled by the mode register. Currently, all bits in EMR3  
are reserved, as shown in Figure 9. The EMR3 is programmed  
via the LM command and will retain the stored information until it  
FIGURE 9 – EXTENDED MODE REGISTER 3 (EMR3) DEFINITION  
BA2  
BA1 BA0 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address bus  
Extended mode  
register (Ex)  
16 15 14 13 12 11 10  
9
8
7
6
5
4
3
2
0
1
0
0
MRS  
0
0
0
0
0
0
0
0
0
0
0
0
0
E15 E14  
Mode Register Set  
Mode register (MR)  
0
0
1
1
0
1
0
1
Extended mode register (EMR)  
Extended mode register (EMR2)  
Extended mode register (EMR3)  
13  
4163.12E-0716-ss-W3H128M72E-XSBX / XNBX  
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com  
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