AS7C33512NTD16A
AS7C33512NTD18A
®
Ball and pin assignment
Pin Configuration for 512 x 18 for 119-ball BGA
1
1
2
3
4
ADSP
ADV/LD
VDD
NC
5
6
7
A
B
C
D
E
VDDQ
NC
A
A
A
A
VDDQ
NC
CE1
A
A
A
CE2
A
NC
A
A
NC
DQb
NC
NC
DQb
NC
DQb
NC
VDD
DQb
NC
DQb
NC
DQPb
A
VSS
VSS
VSS
BWb
VSS
NC
VSS
VSS
VSS
VSS
VSS
LBO
A
VSS
VSS
VSS
VSS
VSS
NC
VSS
BWa
VSS
VSS
VSS
FT
DQPa
NC
DQa
NC
DQa
VDD
NC
DQa
NC
DQa
NC
A
NC
CE0
OE
DQa
VDDQ
DQa
NC
F
VDDQ
NC
G
H
J
A
DQb
VDDQ
NC
R/W
VDD
CLK
NC
VDDQ
DQa
NC
K
L
DQb
VDDQ
DQb
NC
M
N
P
CEN
A12
A02
VDD
NC
VDDQ
NC
DQa
NC
R
T
U
NC
NC
A
A
A
ZZ
VDDQ
NC
NC
NC
NC
NC
VDDQ
1 Note pins 6D and 2P are NC for x16.
2 A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst
counter if burst is desired.
Pin arrangement for TQFP
A10
NC
NC
NC
1
2
3
4
5
6
7
8
9
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
NC
NC
VDDQ
VSSQ
NC
VDDQ
VSSQ
NC
DQpa/NC
DQa
DQa
VSSQ
VDDQ
DQa
DQa
VSS
NC
DQb
DQb
VSSQ 10
VDDQ 11
DQb 12
DQb 13
FT 14
TQFP 14 × 20mm*
VSS
VDD
ZZ
VDD 15
VDD 16
VSS 17
DQa
DQa
VDDQ
VSSQ
DQa
DQa
NC
DQb 18
DQb 19
VDDQ 20
VSSQ 21
DQb 22
DQb 23
DQpb/NC 24
NC 25
NC
VSSQ
VDDQ
NC
VSSQ 26
VDDQ
27
NC 28
NC 29
NC 30
NC
NC
* Pins 24 and 74 are NC in x16
3/11/02; v.1.8H
Alliance Semiconductor
2 of 12
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
