Register Description
3.5.1.30
Offset 40h: CNF—Intel® 6700PXH 64-bit PCI Hub
Configuration Register (D0:F0, F2)
Offset:
Default Value: 0080h
40–41h
Attribute: RW, RWS, RO
Size: 16 bits
This register contains Intel® 6700PXH 64-bit PCI Hub specific control bits.
Bits
Type
Reset
Description
15:14
RW
x
PCI Mode (PMODE): Determines the mode of operation of the PCI bus.
These bits both reflect the status of the current PCI bus mode at power up and
also lets software change the mode by writing to these bits.
Bits Mode
00 Conventional PCI Mode
01 PCI-X Mode 1
10 Reserved
11 Reserved
Note: These bits are provided for debug purposes only. When hot plug is
enabled, software must use the Standard Hot Plug commands to change
the PCI bus mode and frequency. Modifying these bits while hot plug is
enabled may incur undesirable results.
When hot plug is disabled, the Intel® 6700PXH 64-bit PCI Hub checks the
software-requested frequency and mode to be consistent with the slot’s
and bug segment’s capabilities. If the requested frequency/mode is
greater than the capabilities of the slot/bus segment, then the Intel®
6700PXH 64-bit PCI Hub aliases the command to 33 MHz PCI.
13
12
RWS
1
0
I/OxAPIC Config Space Disable (ICSD):
0 = I/OxAPIC configuration space is enabled.
1 = Intel® 6700PXH 64-bit PCI Hub disables all configuration accesses to
I/OxAPIC configuration space from PCI Express*. All configuration accesses
from PCI Express* to I/OxAPIC are master aborted.
This bit has no affect on the SMBus or memory accesses to I/OxAPIC
configuration space.
RW
Enable I/O Space to 1 KB Granularity (EN1K):
0 = Disable.
1 = Enable. I/O space is decoded to 1 KB instead of the 4 KB limit that
currently exists in the I/O base and I/O limit registers. It does this by redefining
bits [11:10] and bits [3:2] of the IOB and IOL registers at offset 1Ch and 1Dh to
be read/write, and enables them to be compared with I/O address bits [11:10]
to determine if they are within the bridge's I/O range.
11
RO
0
0
Reserved.
10:9
RW
PCI Frequency (PFREQ): Determines the frequency at which the PCI bus
operates. After software determines the bus’ capabilities, it sets this value and
the PMODE (bits 14 and 15 of this register) to the desired frequency and
resets the PCI bus. The values are encoded as follows:
00 = 33 MHz
01 = 66 MHz
10 = 100 MHz
11 = 133 MHz
Invalid combinations should not be written by software. Results will be
indeterminate.
8
RO
0
Reserved.
Intel® 6700PXH 64-bit PCI Hub Datasheet
99
INTEL [ INTEL ]
