Register Description
Bits
Type
Reset
Description
3
RO
0
Unsupported Request Reporting Enable (URRE): Enables reporting of
unsupported requests.
2
1
RW
RW
0
0
Fatal Error Reporting Enabled (FERE): Controls reporting of fatal errors.
0 = Disable.
1 = Intel® 6700PXH 64-bit PCI Hub will report fatal errors.
Non-Fatal Error Reporting Enabled (NFERE): Controls reporting of non-
fatal errors.
0 = Disable.
1 = Intel® 6700PXH 64-bit PCI Hub will report uncorrectable errors.
0
RW
0
Correctable Error Reporting Enable (CERE): Controls reporting of
correctable errors.
0 = Disable.
1 = Intel® 6700PXH 64-bit PCI Hub will report correctable errors.
3.5.1.38
Offset 4Eh: EXP_DSTS—PCI Express* Device Status Register
(D0:F0, F2)
Offset:
Default Value: 0000h
4E – 4Fh
Attribute:RWC; RO
Size: 16 bits
This register contains information on the PCI Express* device status.
Bits
Type
Reset
Description
15:6
5
RO
RO
0
0
Reserved.
Transactions Pending (TP): When this bit is set, the Intel® 6700PXH 64-bit
PCI Hub has issued Non-Posted Requests which have not been completed.
The Intel® 6700PXH 64-bit PCI Hub reports this bit cleared only when all
completions for any outstanding Non-Posted Request have been received.
Note that this is a dynamic bit; i.e., this bit could go on and off based on traffic
through the Intel® 6700PXH 64-bit PCI Hub.
4
3
RO
0
0
Aux Power Detected (APD): The Intel® 6700PXH 64-bit PCI Hub does not
support aux power and hence this bit is reserved.
RWC
Unsupported Request Detected URD): The Intel® 6700PXH 64-bit PCI Hub
sets this bit when any unsupported request from PCI Express* is received.
This includes requests that are not claimed by any functions within the Intel®
6700PXH 64-bit PCI Hub, but does NOT include any request that is forwarded
to the PCI interface with completions returned with an unsupported request
status.
2
1
0
RWC
RWC
RWC
0
0
0
Fatal Error Detected (FERRD): When set, a fatal error has been detected
(regardless of whether an error message was generated or not). This bit
remains set until software writes a 1 to clear it.
Non-Fatal Error Detected (NFERRD): When set, a nonfatal error has been
detected (regardless of whether the mask bit was set in advanced error
capability or not). This bit remains set until software writes a 1 to clear it.
Correctable Error Detected (CERRD): When set, a correctable error has
been detected (regardless of whether an error message was generated). This
bit remains set until software writes a 1 to clear it.
Intel® 6700PXH 64-bit PCI Hub Datasheet
103
INTEL [ INTEL ]
