Registers
MM
Event
Description
11
10
9
SLOTMATCH0
Command in slot A, B, or C matches SBMATCH/SBMASK 0
SLOTMATCH1
Command in slot A, B, or C matches SBMATCH/SBMASK 1
SLOTMATCH2
Command in slot A, B, or C matches SBMATCH/SBMASK 2
8
SLOTCMATCH0
Command in slot C matches SBMATCH/SBMASK 0
7
SLOTCMATCH1
Command in slot C matches SBMATCH/SBMASK 1
6
SLOTCMATCH2
Command in slot C matches SBMATCH/SBMASK 2
5
SLOTBMATCH0
Command in slot B matches SBMATCH/SBMASK 0
4
SLOTBMATCH1
Command in slot B matches SBMATCH/SBMASK 1
3
SLOTBMATCH2
Command in slot B matches SBMATCH/SBMASK 2
2
SLOTAMATCH0
Command in slot A matches SBMATCH/SBMASK 0
1
SLOTAMATCH1
Command in slot A matches SBMATCH/SBMASK 1
0
SLOTAMATCH2
Command in slot A matches SBMATCH/SBMASK 2
14.7.2.11 EVENTSEL0: Event Selection Register
In LAI mode, selects 1 of 32 local events (see EVENT register) for 2 uses (Qual Start
and Qual Stop) and sets programmable delay for QualStop. In Normal mode, selects
local event for 2 uses (error injection and NB in-band event signaling) and sets
programmable delay for error injection.
Device:
NodeID
Function: 5
Offset:
E0h
Bit
Attr
Default
Description
31:21
RV
00h
3Fh
Reserved
20:15 RWST
QUALSTOPDELAY: in LAI Mode
Additional number of clocks QualStop is delayed before use (0 to
63)
Power-on default to 63
INJERRORDELAY: in Normal Mode
Additional number of clocks INJERROR is delayed before use (0 to
63)
Power-on default to 63
14:10
RW
00h
INBAND: in LAI Mode
No effect. Northbound in-band debug events can not be asserted
in LAI mode
INBAND: in Normal Mode
If selected event occurs, assert the northbound in-band event bit
in next sync status 0 return and in FBDS0.S3
Intel® 6400/6402 Advanced Memory Buffer Datasheet
227
INTEL [ INTEL ]
