Registers
Device:
NodeID
Function: 3
Offset:
Bit
44h
Attr
Default
Description
31:16 RWST
0000h ROW: Row Address 15:0
15
RWST
RWST
0
SPARE:
14:3
0000h COL: Column Address
BL8[14:3] <==> DRAM Column Address 15:11,9:3
BL4[14:3] <==> DRAM Column Address 14:11,9:2
2:0
RWST
000
BA: Bank Address 2:0
14.5.2.3
MBDATA[9:0]: Memory Test Data
Device:
NodeID
Function: 3
Offset:
6Ch, 68h, 64h, 60h,5Ch, 58h, 54h, 50h,4Ch, 48h
Bit
Attr
Default
Description
31:0
RWST
0000h DATA: see functional description below for definition by mode and register
Description by mode
(note: MBCSR.dtype, MBCSR.mbdata and MBCSR.enable288 select mode)
Reg
Bit Offset
Fixed Data
Pattern
144 bit User
Defined Pattern
288 bit User
defined pattern
Circular Shift
LFSR
5th Fail address
User defined Late Word4 Circular
LFSR random Late User defined Late
data [71:64] & data [71:64] (2nd
Early data [71:64] burst data) &
Early data [71:64]
data [71:64] &
shift data
Early data [71:64]
MBDATA9 31:0 6Ch
MBDATA8 31:0 68h
(2nd burst data)
Late data [71:64] 5th Fail address
5th Fail address
Or
5th Fail address
Or
User defined Late
data [71:64] (1st
& Early data
[71:64] Failure bit
location
Or
burst data)
&
Late data [71:64] Late data [71:64] Late data [71:64]
& Early data & Early data & Early data
[71:64] Failure bit [71:64] Failure bit [71:64] Failure bit
Early data [71:64]
(1st burst data)
accumulator
location
accumulator
location
accumulator
location
accumulator
Fail address 4
Fail address 3
Fail address 2
Fail address 1
User defined Late DW3 Circular shift LFSR random Late User defined Late
data [63:32]
data
data [63:32]
data [63:32]
(2nd burst data)
MBDATA7 31:0 64h
MBDATA6 31:0 60h
MBDATA5 31:0 5Ch
MBDATA4 31:0 58h
User defined Late DW2 Circular shift LFSR random Late User defined Late
data [31:0]
data
data [31:0]
data [31:0]
(2nd burst data)
User defined Early DW1 Circular shift LFSR random
data [63:32] data
User defined Early
Early data [63:32] data [63:32]
(2nd burst data)
User defined Early DW0 Circular shift LFSR random
User defined Early
data [31:0]
(2nd burst data)
data [31:0]
data
Early data [31:0]
Late data [63:32] Fail address 4
Fail address 4
Or
Fail address 4
Or
User defined Late
data [63:32]
(1st burst data)
Failure bit location
accumulator
Or
MBDATA3 31:0 54h
Late data [63:32] Late data [63:32] Late data [63:32]
Failure bit location Failure bit location Failure bit location
accumulator
accumulator
accumulator
194
Intel® 6400/6402 Advanced Memory Buffer Datasheet
INTEL [ INTEL ]
