欢迎访问ic37.com |
会员登录 免费注册
发布采购

6400 参数 Datasheet PDF下载

6400图片预览
型号: 6400
PDF下载: 下载PDF文件 查看货源
内容描述: 高级内存缓冲器 [Advanced Memory Buffer]
分类和应用:
文件页数/大小: 250 页 / 3863 K
品牌: INTEL [ INTEL ]
 浏览型号6400的Datasheet PDF文件第189页浏览型号6400的Datasheet PDF文件第190页浏览型号6400的Datasheet PDF文件第191页浏览型号6400的Datasheet PDF文件第192页浏览型号6400的Datasheet PDF文件第194页浏览型号6400的Datasheet PDF文件第195页浏览型号6400的Datasheet PDF文件第196页浏览型号6400的Datasheet PDF文件第197页  
Registers  
Device:  
NodeID  
Function: 3  
Offset:  
40h  
Bit  
Attr  
Default  
Description  
11:10  
RW  
00  
FAST: Address sequencing  
00 => addressing with XZY toggling (column->bank->row)  
01 => Fast Y with fixed bank  
10 => Fast X with fixed bank  
11 => Fast XY with fixed bank  
9:8  
RW  
00  
DTYPE: Data type selection:  
00 => Fixed data pattern, selected by MBCSR bits 18:16  
01 => 144 or 288 bits user defined data  
10 => Circular shift data  
11 => LFSR data, seeded from 32 bit LFSR seed register.  
Note: Algorithm mode only supports DTYPE = Fixed  
Note: Circular shift data and LFSR data type should not be used for single address  
operation (ATYPE = 01).  
7:6  
RW  
00  
ATYPE: Address type  
00 => Reserved  
01 => Single physical address operation, contained in MBADDR row/column/  
bank.  
10 => start/end physical address range defined in MB_START_ADDR &  
MB_END_ADDR registers.  
In FastX, FastY and FastXY modes, only the bank specified in  
MB_START_ADDR will be exercised.  
11 => full address range of the DIMM as defined in MTR register which specifies  
the number of banks, rows, and columns.  
In FastX, FastY and FastXY modes, only the bank 0 will be exercised.  
5:4  
3:0  
RW  
RV  
00  
0
CMD: Command execution:  
00 => Read only without data comparison  
01 => Write only  
10 => Read with data comparison  
11 => Write followed by Read with data comparison  
Reserved  
Algorithms:  
When Embedded algorithm is applied, please program the following bits at the same  
time.  
1. Select MBCSR.cmd bit[5:4] for the initial command execution mode.  
For all algorithm choices except for Data Retention Read, select "01: write only".  
For Data Retention Read, select "10: read with data comparison".  
2. Program MBCSR.fast bit[11:10] to select FastX, FastY, FastXY, or XZY.  
3. Program proper start/end address registers and corresponding MTR value for DIMM  
type. Do not leave start and end address register as default "00" or the same  
value. Algorithm does not support single or full address modes.  
14.5.2.2  
MBADDR: Memory Test Address  
The register is used by MemBIST only when testing to a single memory location.  
(MBCSR.atype = 2b‘01)  
Intel® 6400/6402 Advanced Memory Buffer Datasheet  
193  
 复制成功!