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5M80ZE64I5N 参数 Datasheet PDF下载

5M80ZE64I5N图片预览
型号: 5M80ZE64I5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, 64-Cell, CMOS, PQFP64, 9 X 9 MM, 0.40 MM PITCH, LEAD FREE, PLASTIC, EQFP-64]
分类和应用:
文件页数/大小: 166 页 / 4004 K
品牌: INTEL [ INTEL ]
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7–30  
Chapter 7: User Flash Memory in MAX V Devices  
Software Support for UFM Block  
UFM-ERASE  
The UFM-ERASE(CE)instruction erases both UFM sector 0 and sector 1 for SPI  
Extended Mode. While for SPI Base mode, the CEinstruction has the same  
functionality as the SECTOR-ERASE(SE)instruction, which erases UFM sector 0 only.  
WENbit and the UFM sectors must not be protected for CEoperation to be successful.  
nCSmust be driven high before the instruction is executed internally. You may poll the  
nRDYbit in the software status register for the completion of the internal self-timed CE  
cycle. For both SPI Extended mode and Base mode, the CEoperation is performed in  
the following sequence as shown in Figure 7–27:  
1. nCSis pulled low.  
2. Opcode 01100000is transmitted into the interface.  
3. nCSis pulled back to high.  
Figure 7–27 shows the UFM-ERASEoperation sequence.  
Figure 7–27. UFM-ERASE Operation Sequence  
nCS  
0
1
2
3
4
5 6 7  
SCK  
SI  
8-bit  
Instruction  
60H  
MSB  
High Impedance  
SO  
MAX V Device Handbook  
January 2011 Altera Corporation  
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