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5M80ZE64I5N 参数 Datasheet PDF下载

5M80ZE64I5N图片预览
型号: 5M80ZE64I5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, 64-Cell, CMOS, PQFP64, 9 X 9 MM, 0.40 MM PITCH, LEAD FREE, PLASTIC, EQFP-64]
分类和应用:
文件页数/大小: 166 页 / 4004 K
品牌: INTEL [ INTEL ]
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7–28  
Chapter 7: User Flash Memory in MAX V Devices  
Software Support for UFM Block  
4. An 8-bit data is transmitted through SI  
.
5. nCSis pulled back to high to indicate the end of transmission.  
Figure 7–23. WRITE Operation Sequence for Extended Mode  
nCS  
0
1
2
3
4
5
6
7
8
9
10 11  
20 21 22 23 24 25 26 27  
36 37 38 39  
SCK  
SI  
8-bit  
Instruction  
16-bit  
Address  
02H  
16-bit Data In  
MSB  
MSB  
MSB  
High Impedance  
SO  
Figure 7–24 shows the WRITEoperation sequence for Base mode.  
Figure 7–24. WRITE Operation Sequence for Base Mode  
nCS  
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23  
SCK  
SI  
8-bit  
Instruction  
8-bit  
Address  
02H  
8-bit Data In  
MSB  
MSB  
High Impedance  
SO  
SECTOR-ERASE  
SECTOR-ERASE(SE)is the instruction of erasing one sector of the UFM block. Each  
sector contains 256 words. WENbit and the sector must not be protected for SE  
operation to be successful. nCSmust be driven high before the instruction is executed  
internally. You may poll the nRDYbit in the software status register for the completion  
of the internal self-timed SECTOR-ERASEcycle. For SPI Extended mode, the SE  
operation is performed in the following sequence, as shown in Figure 7–25:  
1. nCSis pulled low.  
2. Opcode 00100000is transmitted into the interface.  
3. The 16-bit address is sent. The eighth bit (the first seven bits will be discarded) of  
the address indicates which sector is erased; a 0 means sector 0 (UFM0) is erased,  
and a 1 means sector 1 (UFM1) is erased.  
MAX V Device Handbook  
January 2011 Altera Corporation  
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