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5M80ZE64I5N 参数 Datasheet PDF下载

5M80ZE64I5N图片预览
型号: 5M80ZE64I5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, 64-Cell, CMOS, PQFP64, 9 X 9 MM, 0.40 MM PITCH, LEAD FREE, PLASTIC, EQFP-64]
分类和应用:
文件页数/大小: 166 页 / 4004 K
品牌: INTEL [ INTEL ]
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7–24  
Chapter 7: User Flash Memory in MAX V Devices  
Software Support for UFM Block  
The Quartus II software supports both the Base mode (uses 8-bit address and data)  
and the Extended mode (uses 16-bit address and data). Base mode uses only UFM  
sector 0 (2,048 bits), while Extended mode uses both UFM sector 0 and sector 1 (8,192  
bits). There are only four pins in SPI: SI  
,
SO  
,
SCK, and nCS. Table 7–9 describes the SPI  
pins and functions.  
Table 7–9. SPI Interface Signals  
Pin  
Description  
Serial Data Input  
Function  
SI  
SO  
Receive data serially.  
Transmit data serially.  
Serial Data Output  
The clock signal produced from the master device to  
synchronize the data transfer.  
SCK  
nCS  
Serial Data Clock  
Active low signal that enables the slave device to  
receive or transfer data from the master device.  
Chip Select  
Data transmitted to the SIport of the slave device is sampled by the slave device at  
the positive SCKclock. Data transmits from the slave device through SOat the negative  
SCK clock edge. When nCSis asserted, it means the current device is being selected by  
the master device from the other end of the SPI bus for service. When nCSis not  
asserted, the SIand SCKports should be blocked from receiving signals from the  
master device, and SOshould be in High Impedance state to avoid causing contention  
on the shared SPI bus. All instructions, addresses, and data are transferred with the  
MSB first and start with high-to-low nCStransition. The circuit diagram is shown in  
Figure 7–20.  
Figure 7–20. Circuit Diagram for SPI Interface Read or Write Operations  
SI SO SCK nCS  
Op-Code Decoder  
Read, Write, and Erase  
State Machine  
SPI Interface  
Control Logic  
UFM Block  
Address and Data Hub  
Eight-Bit Status Shift Register  
MAX V Device Handbook  
January 2011 Altera Corporation  
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