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5M80ZE64I5N 参数 Datasheet PDF下载

5M80ZE64I5N图片预览
型号: 5M80ZE64I5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, 64-Cell, CMOS, PQFP64, 9 X 9 MM, 0.40 MM PITCH, LEAD FREE, PLASTIC, EQFP-64]
分类和应用:
文件页数/大小: 166 页 / 4004 K
品牌: INTEL [ INTEL ]
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7–20  
Chapter 7: User Flash Memory in MAX V Devices  
Software Support for UFM Block  
No Erase  
The no erase operation never erases the UFM contents. This method is recommended  
when UFM does not require constant re-writing after its initial write of data. For  
example, if the UFM data is to be initialized with data during manufacturing using  
I2C, you may not require writing to the UFM again. In that case, you should use the no  
erase option and save LE resources from being used to create erase logic.  
Read Operation  
The read operation is initiated in the same manner as the write operation except that  
the R/W bit must be set to 1. Three different read operations are supported:  
Current Address Read (Single Byte)  
Random Address Read (Single byte)  
Sequential Read (Multi-Byte)  
After each UFM data has been read and transferred to the master, the UFM address  
register is incremented for all single and multi-byte read operations.  
Current Address Read  
This read operation targets the current byte location pointed to by the UFM address  
register. Figure 7–15 shows the current address read sequence.  
Figure 7–15. Current Address Read Sequence  
Slave Address  
Data  
S
A
P
R/W  
‘1’ (read)  
From Master to Slave  
From Slave to Master  
S – Start Condition  
P – Stop Condition  
A – Acknowledge  
MAX V Device Handbook  
January 2011 Altera Corporation  
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