Processor Configuration Registers
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/0/0/PCI
E4–E7h
00000000h
RO-FW, RO-KFW
32 bits
Size:
BIOS Optimal Default:
000000h
Reset
Value
RST/
PWR
Bit
Access
Description
IA Overclocking Enabled by DSKU
(OC_ENABLED_DSKU)
2
RO-FW
0b
Uncore
The default constant (non-fuse) value is zero. When the VDM
sets this bit, OC will be applied if OC_CTL_SSKU points to
DSKU.
On-die DDR write Vref generation allowed
(DDR_WRTVREF)
1
0
RO-FW
RO-FW
0b
0b
Uncore
Uncore
This bit allow on-die DDR write Vref generation.
PCODE will update this field with the value of
FUSE_DDR_WRTVREF.
DDR3L (1.35V DDR) operation allowed (DDR3L_EN)
This bit allows DDR3L (1.35V DDR) operation.
PCODE will update this field with the value of
FUSE_DDR3L_EN.
Datasheet, Volume 2
83