Processor Configuration Registers
Table 2-9.
PCI Device 1 Function 0–2 Configuration Space Register Address Map (Sheet 2
of 2)
Address
Offset
Register
Symbol
Register Name
Reset Value
Access
92–93h
94–97h
98–99h
9A–9Fh
A0–A1h
A2–A3h
A4–A7h
A8–A9h
AA–ABh
AC–AFh
MC
MA
Message Control
0000h
00000000h
0000h
RW, RO
RW, RO
RW
Message Address
Message Data
MD
RSVD
PEG_CAPL
PEG_CAP
DCAP
DCTL
Reserved
0h
RO
PCI Express-G Capability List
PCI Express-G Capabilities
Device Capabilities
Device Control
0010h
RO
0142h
RO, RW-O
RO, RW-O
RO, RW
RW1C, RO
00008000h
0020h
DSTS
LCAP
Device Status
0000h
Link Capabilities
RO, RO-V,
RW-O, RW-OV
0261CD03h
0000h
B0–B1h
B2–B3h
LCTL
LSTS
Link Control
Link Status
RW, RO, RW-V
RW1C, RO-V,
RO
1001h
B4–B7h
B8–B9h
BA–BBh
SLOTCAP
SLOTCTL
SLOTSTS
Slot Capabilities
Slot Control
Slot Status
00040000h
0000h
RW-O, RO
RO
RO, RW1C,
RO-V
0000h
BC–BDh
BE–BFh
C0–C3h
RCTL
RSVD
RSTS
Root Control
Reserved
0000h
0h
RO, RW
RO
Root Status
RO, RW1C,
RO-V
00000000h
C4–C7h
C8–C9h
CA–CBh
CC–CFh
D0–D1h
D2–D3h
DCAP2
DCTL2
RSVD
Device Capabilities 2
Device Control 2
Reserved
00000800h
0000h
RO, RW-O
RW-V, RW
RO
0h
LCAP2
LCTL2
LSTS2
Link Capabilities 2
Link Control 2
Link Status 2
0000000Eh
0003h
RO-V
RWS, RWS-V
RO-V, RW1C
0000h
2.6.1
VID—Vendor Identification Register
This register, combined with the Device Identification register, uniquely identify any PCI
device.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/1/0–2/PCI
0–1h
8086h
RO
Size:
16 bits
Reset
Value
RST/
PWR
Bit
Access
Description
Vendor Identification (VID)
PCI standard identification for Intel.
15:0
RO
8086h
Uncore
Datasheet, Volume 2
87
INTEL [ INTEL ]
