Processor Configuration Registers
2.5.39
CAPID0_B—Capabilities B Register
Control of bits in this register are only required for customer visible SKU differentiation.
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/0/0/PCI
E8-EBh
00100000h
RO-FW, RO-KFW
32 bits
Size:
BIOS Optimal Default:
000000h
RST/
PWR
Bit
Access
Reset Value
Description
31
30
29
RO-FW
RO-FW
RO-FW
0h
0b
0b
Reserved (RSVD)
Reserved (RSVD)
Reserved (RSVD)
SMT Capability (SMT)
28
RO-FW
0b
Uncore
Uncore
This setting indicates whether or not the processor is SMT
capable.
Cache Size Capability (CACHESZ)
This setting indicates the supporting cache sizes.
27:25
24
RO-FW
RO-FW
000b
0b
Reserved (RSVD)
DDR3 Maximum Frequency Capability with 100 Memory
(PLL_REF100_CFG)
DDR3 Maximum Frequency Capability with 100 MHz memory.
PCODE will update this field with the value of
FUSE_PLL_REF100_CFG and then apply SSKU overrides.
Maximum allowed memory frequency with 100 MHz reference
clock. Also serves as defeature.
Unlike 133 MHz reference fuses, these are normal 3-bit fields.
0 = 100 MHz ref disabled
1 = Up to DDR-1400 (7 x 200)
23:21
RO-FW
000b
Uncore
2 = Up to DDR-1600 (8 x 200)
3 = Up to DDR-1800 (8 x 200)
4 = Up to DDR-2000 (10 x 200)
5 = Up to DDR-2200 (11 x 200)
6 = Up to DDR-2400 (12 x 200)
7 = No limit (but still limited by %MAX_DDR_FREQ200 to
2600)
PCIe Gen 3 Disable (PEGG3_DIS)
PCODE will update this field with the value of
FUSE_PEGG3_DIS and then apply SSKU overrides.
This is a defeature fuse – an un-programmed device should
Uncore have PCIe Gen 3 capabilities enabled.
20
RO-FW
0b
0 = Capable of running any of the Gen 3-compliant PEG
controllers in Gen 3 mode (Devices 0/1/0, 0/1/1, 0/1/2)
1 = Not capable of running any of the PEG controllers in Gen
3 mode
19
18
RO-FW
RO-FW
0b
0b
Reserved (RSVD)
Additive Graphics Enabled (ADDGFXEN)
Uncore 0 = Additive Graphics Disabled
1 = Additive Graphics Enabled
Additive Graphics Capable (ADDGFXCAP)
Uncore 0 = Capable of Additive Graphics
1 = Not capable of Additive Graphics
17
RO-FW
0b
16
RO-FW
RO-FW
0b
0h
Reserved (RSVD)
Reserved (RSVD)
15:12
84
Datasheet, Volume 2
INTEL [ INTEL ]
