Functional Description
Table 5-3 summarizes interrupt behavior for MSI and wire-modes. In the table “bits”
refers to the Hot-Plug and PME interrupt bits.
Table 5-3.
MSI versus PCI IRQ Actions
Wire-Mode
Interrupt Register
MSI Action
Action
All bits 0
Wire inactive
No action
Send
message
One or more bits set to 1
Wire active
Wire active
Send
message
One or more bits set to 1, new bit gets set to 1
One or more bits set to 1, software clears some (but not all)
bits
Send
message
Wire active
Wire inactive
Wire active
One or more bits set to 1, software clears all bits
No action
Software clears one or more bits, and one or more bits are
set on the same clock
Send
message
5.2.2
Power Management
5.2.2.1
S3/S4/S5 Support
Software initiates the transition to S3/S4/S5 by performing an IO write to the Power
Management Control register in the ICH10. After the IO write completion has been
returned to the processor, each root port will send a PME_Turn_Off TLP (Transaction
Layer Packet) message on its downstream link. The device attached to the link will
eventually respond with a PME_TO_Ack TLP message followed by sending a
PM_Enter_L23 DLLP (Data Link Layer Packet) request to enter the L2/L3 Ready state.
When all of the ICH10 root ports links are in the L2/L3 Ready state, the ICH10 power
management control logic will proceed with the entry into S3/S4/S5.
Prior to entering S3, software is required to put each device into D3HOT. When a device
is put into D3HOT it will initiate entry into a L1 link state by sending a PM_Enter_L1
DLLP. Thus under normal operating conditions when the root ports sends the
PME_Turn_Off message the link will be in state L1. However, when the root port is
instructed to send the PME_Turn_Off message, it will send it whether or not the link
was in L1. Endpoints attached to ICH can make no assumptions about the state of the
link prior to receiving a PME_Turn_Off message.
5.2.2.2
5.2.2.3
Resuming from Suspended State
The root port contains enough circuitry in the suspend well to detect a wake event
through the WAKE# signal and to wake the system. When WAKE# is detected asserted,
an internal signal is sent to the power management controller of the ICH10 to cause
the system to wake up. This internal message is not logged in any register, nor is an
interrupt/GPE generated due to it.
Device Initiated PM_PME Message
When the system has returned to a working state from a previous low power state, a
device requesting service will send a PM_PME message continuously, until acknowledge
by the root port. The root port will take different actions depending upon whether this
is the first PM_PME has been received, or whether a previous message has been
received but not yet serviced by the operating system.
98
Datasheet
INTEL [ INTEL ]
