Chipset Configuration Registers
10.1.10 V1CTL—Virtual Channel 1 Resource Control Register
Offset Address: 0020–0023h
Attribute:
Size:
R/W, RO
32-bit
Default Value:
00000000h (Consumer)
00000000h (Corporate)
Bit
Description
Virtual Channel Enable (EN) — R/W. Enables the VC when set. Disables the VC
when cleared.
31
30:27
26:24
23:20
Reserved
Virtual Channel Identifier (ID) — R/W. Indicates the ID to use for this virtual
channel.
Reserved
19:17
(Corporate
Only)
Port Arbitration Select (PAS) —RO. The only permissible value of this field is 0h
for fixed arbitration.
19:17
Port Arbitration Select (PAS) — R/W. Indicates which port table is being
(Consumer programmed. The only permissible value of this field is 4h for the time-based WRR
Only)
entries.
16
(Corporate Reserved
Only)
16
Load Port Arbitration Table (LAT) — R/W. When set, the port arbitration table
(Consumer loaded based upon the PAS field in this register. This bit always returns 0 when
Only)
read.
15:8
Reserved
Transaction Class / Virtual Channel Map (TVM) — R/W. Indicates which
transaction classes are mapped to this virtual channel. When a bit is set, this
transaction class is mapped to the virtual channel.
7:1
0
Reserved
10.1.11 V1STS—Virtual Channel 1 Resource Status Register
Offset Address: 0026–0027h
Attribute:
Size:
RO
16-bit
Default Value:
0000h
Bit
Description
15:2
1
Reserved
VC Negotiation Pending (NP) — RO. When set, indicates the virtual channel is still
being negotiated with ingress ports.
Port Arbitration Tables Status (ATS) — RO. Indicates the coherency status of the
port arbitration table. This bit is set when LAT (offset 000Ch:bit 0) is written with
value 1 and PAS (offset 0014h:bits19:17) has value of 4h. This bit is cleared after the
table has been updated.
0
310
Datasheet
INTEL [ INTEL ]
